ChangeLog

Nguyen Anh Quynh edited this page Aug 12, 2015 · 295 revisions

(Look here for the detailed changelog of v3.0.4)

This page details all the changes in the next branch, against the master branch. This next branch will become the next version, and will be merged into the master branch when next version is released.

The latest next code can be directly retrieved from https://github.com/aquynh/capstone/archive/next.zip, or via git - see instructions at the bottom of this page.

NOTE: changes are listed in time order: newer changes are at the top, older changes are at the bottom.


Library:

  • New option CS_OPT_MNEMONIC to customize instruction mnemonics (see docs).
  • New API cs_regs_access() & access info for instruction operands (see documentation).
  • make.sh has been rewritten to be faster & more portable.
  • pkg-config is consistent with installation.

X86:

  • Support new syntax CS_OPT_SYNTAX_MASM (see this Python sample).
  • Properly handle AL/AX/EAX operand for OUT instruction in AT&T syntax.
  • Print immediate operand in positive form in some algorithm instructions.
  • Properly decode many SSE instructions.
  • Properly decode some instructions beginning with f3 or 660f, where f3 & 66 are not prefix.
  • Correct the size of immediate operand for instruction CMP8i8.
  • Update core with 46 instructions added (including latest extensions from Broadwell CPU).
  • Fix operand size of instructions with operand PTR []
  • Add prefix constant REPE (= REP).
  • Handle the opcode 0x82 (non-64bit instructions).
  • Properly handle instructions using CR9~CR15 registers.
  • Remove dead SSE_CC constants.
  • Add new registers DR8-DR15.
  • New undocumented instructions FDISI8087_NOP, FENI8087_NOP & FFREEP.

PowerPC:

  • Update core with 164 instructions added (with new QPX extension).

Mips:

  • Update core with 40 instructions added.
  • Sanity check for the input size for MIPS64 mode.

Arm:

  • Fixed a memory corruption bug on IT instruction.
  • BLX instruction modifies PC & LR registers.
  • Remove bogus instructions ASRS, LSRS, SUBS and MOVS.
  • Update core with 2 instructions added.
  • Add lshift field to arm_op_mem.

XCore:

  • Fixed a memory corruption bug when instruction has a memory operand.

Python:

  • setup.py supports option --user to allows to install for local usage.
  • Properly handle the destruction of Cs object in the case the shared library was already unloaded.
  • X86Op.avx_zero_mask now has c_bool type, not c_uint8 type.

Tests:

  • Rename test.c to test_basic.c.

Checkout -next branch

To checkout next branch, simply do this:

    $ git pull
    $ git checkout next

Then make sure to compile and install new code:

    $ ./make.sh
    $ sudo ./make.sh install

Just in case, always remember to reinstall bindings whenever you update the core to maintain the compatibility between the core & the bindings. For example, with Python binding, do:

    $ cd bindings/python
    $ sudo make install

The next branch is frequently updated, so make sure to always get the latest code with:

    $ git pull origin next

Any time you want to get back to master branch, do:

    $ git checkout master