全般的なTODO（日本語） #2
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Thanks a lot. |
If you can, please still report the issue to avrdude project. Thanks. |
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ATパックリポジトリが更新され、[Microchip AVR-Dx Series Device Support (2.4.286)]が公開された。
待望の AVR-DUサポート初公開。ただしデータシートはまだ公開されていない。見つけられるのは ATDFとヘッダーファイルだけということだ。 早速ARパックをダウンロードしてAVR-DA/DBのヘッダーファイルと比較してみると、早速驚愕の事実が。AVRDUDE やブートローダーの実装に直接関わる部分を抜き書きすると、、、 --- test/PACK4/include/avr/ioavr64db32.h 2023-12-01 00:00:00
+++ test/PACK4/include/avr/ioavr64du32.h 2023-12-01 00:00:00
~~~
---------------------------------------------------------------------------
NVMCTRL - Non-volatile Memory Controller
--------------------------------------------------------------------------
*/
@@ -1503,13 +1055,14 @@
{
register8_t CTRLA; /* Control A */
register8_t CTRLB; /* Control B */
- register8_t STATUS; /* Status */
+ register8_t CTRLC; /* Control C */
+ register8_t reserved_1[1];
register8_t INTCTRL; /* Interrupt Control */
register8_t INTFLAGS; /* Interrupt Flags */
- register8_t reserved_1[1];
- _WORDREGISTER(DATA); /* Data */
+ register8_t STATUS; /* Status */
+ register8_t reserved_2[1];
+ _DWORDREGISTER(DATA); /* Data */
_DWORDREGISTER(ADDR); /* Address */
- register8_t reserved_2[4];
} NVMCTRL_t;
/* Command select */
@@ -1540,10 +1093,9 @@
typedef enum NVMCTRL_ERROR_enum
{
NVMCTRL_ERROR_NOERROR_gc = (0x00<<4), /* No Error */
- NVMCTRL_ERROR_ILLEGALCMD_gc = (0x01<<4), /* Write command not selected */
- NVMCTRL_ERROR_ILLEGALSADDR_gc = (0x02<<4), /* Write to section not allowed */
- NVMCTRL_ERROR_DOUBLESELECT_gc = (0x03<<4), /* Selecting new write command while write command already seleted */
- NVMCTRL_ERROR_ONGOINGPROG_gc = (0x04<<4) /* Starting a new programming operation before previous is completed */
+ NVMCTRL_ERROR_INVALIDCMD_gc = (0x01<<4), /* Write command not selected or not valid */
+ NVMCTRL_ERROR_WRITEPROTECT_gc = (0x02<<4), /* Write to section not allowed */
+ NVMCTRL_ERROR_CMDCOLLISION_gc = (0x03<<4) /* Selecting new write command while programming is ongoing */
} NVMCTRL_ERROR_t;
~~~
/* NVMCTRL - Non-volatile Memory Controller */
#define NVMCTRL_CTRLA _SFR_MEM8(0x1000)
#define NVMCTRL_CTRLB _SFR_MEM8(0x1001)
-#define NVMCTRL_STATUS _SFR_MEM8(0x1002)
-#define NVMCTRL_INTCTRL _SFR_MEM8(0x1003)
-#define NVMCTRL_INTFLAGS _SFR_MEM8(0x1004)
-#define NVMCTRL_DATA _SFR_MEM16(0x1006)
-#define NVMCTRL_DATAL _SFR_MEM8(0x1006)
-#define NVMCTRL_DATAH _SFR_MEM8(0x1007)
-#define NVMCTRL_ADDR _SFR_MEM32(0x1008)
-#define NVMCTRL_ADDR0 _SFR_MEM8(0x1008)
-#define NVMCTRL_ADDR1 _SFR_MEM8(0x1009)
-#define NVMCTRL_ADDR2 _SFR_MEM8(0x100A)
-#define NVMCTRL_ADDR3 _SFR_MEM8(0x100B)
+#define NVMCTRL_CTRLC _SFR_MEM8(0x1002)
+#define NVMCTRL_INTCTRL _SFR_MEM8(0x1004)
+#define NVMCTRL_INTFLAGS _SFR_MEM8(0x1005)
+#define NVMCTRL_STATUS _SFR_MEM8(0x1006)
+#define NVMCTRL_DATA _SFR_MEM32(0x1008)
+#define NVMCTRL_DATA0 _SFR_MEM8(0x1008)
+#define NVMCTRL_DATA1 _SFR_MEM8(0x1009)
+#define NVMCTRL_DATA2 _SFR_MEM8(0x100A)
+#define NVMCTRL_DATA3 _SFR_MEM8(0x100B)
+#define NVMCTRL_ADDR _SFR_MEM32(0x100C)
+#define NVMCTRL_ADDR0 _SFR_MEM8(0x100C)
+#define NVMCTRL_ADDR1 _SFR_MEM8(0x100D)
+#define NVMCTRL_ADDR2 _SFR_MEM8(0x100E)
+#define NVMCTRL_ADDR3 _SFR_MEM8(0x100F)
~~~
#if (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
-# define USER_SIGNATURES_START (0x1080)
-# define USER_SIGNATURES_SIZE (32)
-# define USER_SIGNATURES_PAGE_SIZE (32)
-#else
-# define USER_SIGNATURES_START (0x1080U)
-# define USER_SIGNATURES_SIZE (32U)
-# define USER_SIGNATURES_PAGE_SIZE (32U)
-#endif
-#define USER_SIGNATURES_END (USER_SIGNATURES_START + USER_SIGNATURES_SIZE - 1)
-
-#if (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
-# define SIGNATURES_START (0x1100)
+# define SIGNATURES_START (0x1080)
# define SIGNATURES_SIZE (3)
# define SIGNATURES_PAGE_SIZE (128)
#else
-# define SIGNATURES_START (0x1100U)
+# define SIGNATURES_START (0x1080U)
# define SIGNATURES_SIZE (3U)
# define SIGNATURES_PAGE_SIZE (128U)
#endif
#define SIGNATURES_END (SIGNATURES_START + SIGNATURES_SIZE - 1)
~~~
#if (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
-# define PROD_SIGNATURES_START (0x1103)
+# define PROD_SIGNATURES_START (0x1083)
# define PROD_SIGNATURES_SIZE (125)
# define PROD_SIGNATURES_PAGE_SIZE (128)
#else
-# define PROD_SIGNATURES_START (0x1103U)
+# define PROD_SIGNATURES_START (0x1083U)
# define PROD_SIGNATURES_SIZE (125U)
# define PROD_SIGNATURES_PAGE_SIZE (128U)
#endif
#define PROD_SIGNATURES_END (PROD_SIGNATURES_START + PROD_SIGNATURES_SIZE - 1)
#if (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
+# define BOOTROW_START (0x1100)
+# define BOOTROW_SIZE (256)
+# define BOOTROW_PAGE_SIZE (256)
+#else
+# define BOOTROW_START (0x1100U)
+# define BOOTROW_SIZE (256U)
+# define BOOTROW_PAGE_SIZE (256U)
+#endif
+#define BOOTROW_END (BOOTROW_START + BOOTROW_SIZE - 1)
~~~
@@ -7078,6 +6162,26 @@
#define FUSE8_DEFAULT (0x0)
#define FUSE_BOOTSIZE_DEFAULT (0x0)
+/* Fuse Byte 9 Reserved */
+
+/* Fuse Byte 10 (PDICFG) */
+#define FUSE_LEVEL0 (unsigned char)_BV(0) /* Protection Level Bit 0 */
+#define FUSE_LEVEL1 (unsigned char)_BV(1) /* Protection Level Bit 1 */
+#define FUSE_KEY0 (unsigned char)_BV(4) /* NVM Protection Activation Key Bit 0 */
+#define FUSE_KEY1 (unsigned char)_BV(5) /* NVM Protection Activation Key Bit 1 */
+#define FUSE_KEY2 (unsigned char)_BV(6) /* NVM Protection Activation Key Bit 2 */
+#define FUSE_KEY3 (unsigned char)_BV(7) /* NVM Protection Activation Key Bit 3 */
+#define FUSE_KEY4 (unsigned char)_BV(8) /* NVM Protection Activation Key Bit 4 */
+#define FUSE_KEY5 (unsigned char)_BV(9) /* NVM Protection Activation Key Bit 5 */
+#define FUSE_KEY6 (unsigned char)_BV(10) /* NVM Protection Activation Key Bit 6 */
+#define FUSE_KEY7 (unsigned char)_BV(11) /* NVM Protection Activation Key Bit 7 */
+#define FUSE_KEY8 (unsigned char)_BV(12) /* NVM Protection Activation Key Bit 8 */
+#define FUSE_KEY9 (unsigned char)_BV(13) /* NVM Protection Activation Key Bit 9 */
+#define FUSE_KEY10 (unsigned char)_BV(14) /* NVM Protection Activation Key Bit 10 */
+#define FUSE_KEY11 (unsigned char)_BV(15) /* NVM Protection Activation Key Bit 11 */
+#define FUSE10_DEFAULT (0x3)
+#define FUSE_PDICFG_DEFAULT (0x3)
AVR-DUは AVR-DBをベースに MVIOを削除してUSB周辺機能に置き換えるだけかと想像していたが、その程度の変更では済まなかったようだ。長らくペンディングしていた理由はこれだろうか。AC/ADCや CLKCTRLにも細かな差異があるし、もしかするとチップマスクを丸ごと全部再設計したのか？ |
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このページは気がつくと更新されます。
It's written frankly, so even if it's automatically translated into English, it might not come across correctly.
進行中
提案、報告済
解決済
些細な、あるいはまだ報告していない提案と問題
(core)
(moderAVR 構成)
(serialupdi)
(jtagmkII)
(これはずっと後回しで良い)
拡張された256bit SIBで判別できる？（これはUPDI4AVRの課題）識別不能を確認。AVR_Dx=KV0で統一。tinyAVR=59B、AVR_EA=59Fで、主クロック仕様がわかるだけちょっと別な話（ゆるい結合性）
AVRデータシート日本語翻訳 https://avr.jp/ （添削）
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