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Unexpected error when load label address to register in AArch64 #409

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ApsarasX opened this issue May 6, 2023 · 3 comments
Open

Unexpected error when load label address to register in AArch64 #409

ApsarasX opened this issue May 6, 2023 · 3 comments

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@ApsarasX
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ApsarasX commented May 6, 2023

The assembly code I want.

func:
        add     w0, w0, w1
        ret
load_func:
        adrp    x0, func
        add     x0, x0, :lo12:func
        ret

My usage

//......

  Assembler cc(&code);

  Label func = cc.newNamedLabel("func");
  Label load_func = cc.newNamedLabel("load_func");

  cc.bind(func);
  cc.add(w0, w0, w1);
  cc.ret(x30);

  cc.bind(load_func);
  cc.adrp(x0, func);
  // cc.add(x0, x0, :lo12:func);
  cc.ret(x30);

// ......

Result:

func:
add w0, w0, w1
ret x30
load_global:
libc++abi: terminating with uncaught exception of type std::logic_error: AsmJit error: InvalidDisplacement: adrp x0, func

By the way, I found that there is no way to implement add x0, x0, :lo12:func in asmjit AArch64.

@ApsarasX ApsarasX changed the title How to load label address to register in AArch64 There is no way to implement add x0, x0, :lo12:label in asmjit AArch64. May 6, 2023
@ApsarasX ApsarasX changed the title There is no way to implement add x0, x0, :lo12:label in asmjit AArch64. Unexpected error when load label address to register in AArch64 May 6, 2023
@kobalicek
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@ApsarasX I haven't forgotten about this one.

I initially started hacking this feature, but then I have decided that this cannot just be a hacky feature. My current idea is to add a support to have Imm to actually represent an expression, which would just calculate the value once the code is being relocated.

But I cannot make this like tomorrow, this would need a careful design so it won't regress the performance and it would work with all instructions (I think even x86 backend then should get this feature).

@mgood7123
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any progress ?

@kobalicek
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I'm sorry, but no progress on this front - I don't have time capacity to work on this at the moment.

I plan to generate AArch64 assembler similarly to how ARM32 assembler is generated (in a separate branch atm), which would be able to handle expressions with labels (that's a feature that is not really ready at the moment). But this is not a high priority now because of time constraints.

I can reconsider if there is a big interest in having this functional.

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