corrected otir etc.

ben0109 · Apr 12, 2012 · 17d7437 · 17d7437
1 parent 396cd22
commit 17d7437
Showing 1 changed file with 12 additions and 8 deletions.
diff --git a/vhdl/t80/T80_MCode.vhd b/vhdl/t80/T80_MCode.vhd
@@ -1836,10 +1836,12 @@ begin
 					Set_BusB_To <= "0110";
 					Set_Addr_To <= aXY;
 				when 3 =>
-					if IR(3) = '0' then
-						IncDec_16 <= "0010";
-					else
-						IncDec_16 <= "1010";
+					if IR(3) = '0' then
+						--IncDec_16 <= "0010";
+						IncDec_16 <= "0110";
+					else
+						--IncDec_16 <= "0010";
+						IncDec_16 <= "0110";
 					end if;
 					TStates <= "100";
 					Write <= '1';
@@ -1865,10 +1867,12 @@ begin
 					Set_BusB_To <= "0110";
 					Set_Addr_To <= aBC;
 				when 3 =>
-					if IR(3) = '0' then
-						IncDec_16 <= "0010";
-					else
-						IncDec_16 <= "1010";
+					if IR(3) = '0' then
+						--IncDec_16 <= "0010";
+						IncDec_16 <= "0110";
+					else
+						--IncDec_16 <= "0010";
+						IncDec_16 <= "0110";
 					end if;
 					IORQ <= '1';
 					Write <= '1';