H7 Fix frozen ADC values

[klutvott123]

Fix adc readings not updating on H7 mcus by invalidating the cached adc dma buffer before reading.
The adc dma buffer is in DMA_RAM, and it says here that cache coherency operations are needed for reading, but we're currently not doing it

betaflight/src/main/drivers/stm32/memprot_stm32h7xx.c

Lines 48 to 60 in e5cd2ca

	#ifdef USE_DMA_RAM
	{
	// DMA transmit buffer in D2 SRAM1
	// Reading needs cache coherence operation
	.start = (uint32_t)&dmaram_start,
	.end = (uint32_t)&dmaram_end,
	.size = 0, // Size determined by ".end"
	.perm = MPU_REGION_FULL_ACCESS,
	.exec = MPU_INSTRUCTION_ACCESS_ENABLE,
	.shareable = MPU_ACCESS_SHAREABLE,
	.cacheable = MPU_ACCESS_CACHEABLE,
	.bufferable = MPU_ACCESS_NOT_BUFFERABLE,
	},

Fixes #12419
Fixes #12280

[github-actions]

Do you want to test this code? Here you have an automated build:
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[SteveCEvans]

Good spot: the comment at line 538 was clearly misleading.

[haslinghuis]

Lols, Data Cache was disabled on F7 6 years ago:

//HAL_CLEANINVALIDATECACHE((uint32_t*)&adcValues, configuredAdcChannels);

[klutvott123]

@haslinghuis That line of code has been commented out from the start for F7. The data cache is enabled for F7, but the dma buffers are located in DTCM RAM, and can be directly accessed by the CPU so no manual operations are needed. dma can't access dtcm ram on H7 so we have to do it like this 🙂

[blckmn]

AUTOMERGE: (FAIL)

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