re-add lost files.

bwalex · Apr 18, 2012 · 3382206 · 3382206
1 parent d6053bd
commit 3382206
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Showing 4 changed files with 90 additions and 81 deletions.
diff --git a/hdl/TestInterface.sv b/hdl/TestInterface.sv
diff --git a/hdl/sim/sim_PLL/TestInterface.sv b/hdl/sim/sim_PLL/TestInterface.sv
@@ -3,23 +3,22 @@ module TestInterface;
 
 	logic	  inclk0;
 	logic   clock;
-	logic   reset;
-	wire    reset_n;
+	logic   reset_n;
 	logic   trigger;
+	logic   [15:0]PLL_DATA;
 	logic   [7:0] MultiFactor;
-	logic   [7:0] DividFactor;
-	wire   [15:0] PLL_DATA;
+  logic   [7:0] DividFactor;
 	logic	c0;
 	logic	locked;
 
 	logic   busy;
 	logic   [8:0]  data_out;
-
-	assign reset_n  = ~reset;
-	assign PLL_DATA = { MultiFactor, DividFactor };
-
+
 	PLL_INTERFACE PI2 (.*);
 
+	assign PLL_DATA [15:8] = MultiFactor;
+	assign PLL_DATA [ 7:0] = DividFactor;
+
 	initial
 	begin
 	  clock = 0;
@@ -35,13 +34,13 @@ module TestInterface;
 
 	initial
 	begin
-	  reset = 0;
+	  reset_n = 1;
 	  trigger = 0;
 	  MultiFactor = 8'b00000110; // 6/3 = 2
 	  DividFactor = 8'b00000011;
 
-	  #6ns reset = 1;
-	  #10ns reset = 0;
+	  #6ns reset_n = 0;
+	  #10ns reset_n = 1;
 
     #100ns trigger =1;
     #50ns trigger =0;
@@ -65,4 +64,4 @@ module TestInterface;
     #50ns trigger =0;
 
   end
-endmodule
+endmodule
diff --git a/hdl/sim/sim_PLL/load_sim.tcl b/hdl/sim/sim_PLL/load_sim.tcl
@@ -11,11 +11,11 @@ vmap work       ./libraries/work/
 # Compile the additional test files
 vlog     $HDL_BASE/PLL.v
 vlog     $HDL_BASE/REPLL.v
-vlog -sv ./REPLL_CONTROL.sv
+vlog     $HDL_BASE/REPLL_CONTROL.sv
 vlog -sv $HDL_BASE/PLL_INTERFACE.sv
 vlog -sv ./TestInterface.sv
 # Elaborate the top-level design
 vsim -t ps -L work -L altera_mf_ver -L 220model_ver -L altera_lnsim_ver -L altera_ver -L cycloneive_ver $TOP_LEVEL_NAME
 
 # Load the waveform "do file" macro script
-#do ./wave2.do
+do ./wave.do
diff --git a/hdl/sim/sim_PLL/wave.do b/hdl/sim/sim_PLL/wave.do
@@ -0,0 +1,77 @@
+onerror {resume}
+quietly WaveActivateNextPane {} 0
+
+radix define repll_ctr_states {
+  4'b0000 "IDLE" -color white,
+  4'b0001 "RESET_PLL" -color green,
+  4'b0010 "RESET_REC" -color yellow,
+  4'b0011 "SET_TYPE_M" -color blue,
+  4'b0100 "SET_PARAM_HM" -color blue,
+  4'b0101 "SET_PARAM_LM" -color yellow,
+  4'b0110 "WRITE_HM" -color orange,
+  4'b0111 "WRITE_LM" -color orange,
+  4'b1000 "INTERVAL" -color orange,
+  4'b1001 "SET_TYPE_C" -color white,
+  4'b1010 "SET_PARAM_HC" -color white,
+  4'b1011 "SET_PARAM_LC" -color white,
+  4'b1100 "WRITE_HC" -color white,
+  4'b1101 "WRITE_LC" -color white,
+  4'b1110 "RECONFIG" -color white,
+  4'b1111 "BUSY" -color white,
+  -default binary
+}
+
+add wave -noupdate /TestInterface/inclk0
+add wave -noupdate /TestInterface/clock
+add wave -noupdate /TestInterface/reset_n
+add wave -noupdate /TestInterface/trigger
+add wave -noupdate -radix hexadecimal /TestInterface/MultiFactor
+add wave -noupdate -radix hexadecimal /TestInterface/DividFactor
+add wave -noupdate -radix hexadecimal /TestInterface/PLL_DATA
+add wave -noupdate /TestInterface/c0
+add wave -noupdate /TestInterface/locked
+add wave -noupdate /TestInterface/busy
+add wave -noupdate -radix hexadecimal /TestInterface/data_out
+
+add wave -noupdate -divider REPLL_CONTROL_INTERNAL
+add wave -noupdate /TestInterface/PI2/ctr2/clock_ctr
+add wave -noupdate /TestInterface/PI2/ctr2/sys_reset
+add wave -noupdate /TestInterface/PI2/ctr2/trigger
+add wave -noupdate /TestInterface/PI2/ctr2/busy_ctr
+add wave -noupdate -radix hexadecimal /TestInterface/PI2/ctr2/MultiFactor
+add wave -noupdate -radix hexadecimal /TestInterface/PI2/ctr2/DividFactor
+add wave -noupdate -radix decimal /TestInterface/PI2/ctr2/counter_param_ctr
+add wave -noupdate -radix decimal /TestInterface/PI2/ctr2/counter_type_ctr
+add wave -noupdate -radix repll_ctr_states /TestInterface/PI2/ctr2/state
+add wave -noupdate -radix repll_ctr_states /TestInterface/PI2/ctr2/next_state
+add wave -noupdate -radix decimal /TestInterface/PI2/ctr2/counter_5
+add wave -noupdate -radix decimal /TestInterface/PI2/ctr2/counter_10
+add wave -noupdate /TestInterface/PI2/ctr2/Delay_5
+add wave -noupdate /TestInterface/PI2/ctr2/Delay_10
+add wave -noupdate /TestInterface/PI2/ctr2/timed_5
+add wave -noupdate /TestInterface/PI2/ctr2/timed_10
+add wave -noupdate /TestInterface/PI2/ctr2/reset_ctr
+add wave -noupdate /TestInterface/PI2/ctr2/pll_areset_in_ctr
+add wave -noupdate /TestInterface/PI2/ctr2/write_param_ctr
+add wave -noupdate /TestInterface/PI2/ctr2/reconfig_ctr
+add wave -noupdate /TestInterface/PI2/ctr2/pll_pfdena
+add wave -noupdate /TestInterface/PI2/ctr2/pll_read_param
+add wave -noupdate -radix hexadecimal /TestInterface/PI2/ctr2/config_data_in
+
+TreeUpdate [SetDefaultTree]
+WaveRestoreCursors {{Cursor 1} {0 ps} 0}
+configure wave -namecolwidth 279
+configure wave -valuecolwidth 103
+configure wave -justifyvalue left
+configure wave -signalnamewidth 0
+configure wave -snapdistance 10
+configure wave -datasetprefix 0
+configure wave -rowmargin 4
+configure wave -childrowmargin 2
+configure wave -gridoffset 0
+configure wave -gridperiod 1
+configure wave -griddelta 40
+configure wave -timeline 0
+configure wave -timelineunits ps
+update
+WaveRestoreZoom {0 ps} {809 ps}