fix: not use rbp in JIT (#533)

bytedance · Oct 8, 2023 · fd7e221 · fd7e221
1 parent 805ad67
commit fd7e221
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Showing 3 changed files with 5 additions and 7 deletions.
diff --git a/internal/decoder/assembler_regabi_amd64.go b/internal/decoder/assembler_regabi_amd64.go
@@ -420,9 +420,9 @@ func (self *_Assembler) call_go(fn obj.Addr) {
 }
 
 func (self *_Assembler) callc(fn obj.Addr) {
-    self.Emit("XCHGQ", _IP, _BP)
+    self.save(_IP)
     self.call(fn)
-    self.Emit("XCHGQ", _IP, _BP)
+    self.load(_IP)
 }
 
 func (self *_Assembler) call_c(fn obj.Addr) {

diff --git a/internal/decoder/generic_regabi_amd64.go b/internal/decoder/generic_regabi_amd64.go
@@ -119,9 +119,9 @@ func (self *_ValueDecoder) call_go(fn obj.Addr) {
 }
 
 func (self *_ValueDecoder) callc(fn obj.Addr) {
-    self.Emit("XCHGQ", _IP, _BP)
+    self.save(_IP)  
     self.call(fn)
-    self.Emit("XCHGQ", _IP, _BP)
+    self.load(_IP)  
 }
 
 func (self *_ValueDecoder) call_c(fn obj.Addr) {

diff --git a/internal/encoder/assembler_regabi_amd64.go b/internal/encoder/assembler_regabi_amd64.go
@@ -171,7 +171,7 @@ var (
 )
 
 var (
-    _REG_ffi = []obj.Addr{ _RP, _RL, _RC}
+    _REG_ffi = []obj.Addr{ _RP, _RL, _RC, _SP_q}
     _REG_b64 = []obj.Addr{_SP_p, _SP_q}
 
     _REG_all = []obj.Addr{_ST, _SP_x, _SP_f, _SP_p, _SP_q, _RP, _RL, _RC}
@@ -510,11 +510,9 @@ func (self *_Assembler) call_b64(pc obj.Addr) {
 
 func (self *_Assembler) call_c(pc obj.Addr) {
     self.Emit("XCHGQ", _SP_p, _BX)
-    self.Emit("XCHGQ", _SP_q, _BP)
     self.call(pc)               // CALL $pc
     self.xload(_REG_ffi...)     // LOAD $REG_ffi
     self.Emit("XCHGQ", _SP_p, _BX)
-    self.Emit("XCHGQ", _SP_q, _BP)
 }
 
 func (self *_Assembler) call_go(pc obj.Addr) {