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Allow 'Index' type in a sum-of-product type.
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Fixes #75
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christiaanb committed Sep 8, 2015
1 parent c9a6db8 commit 1e6b7be
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4 changes: 4 additions & 0 deletions clash-vhdl/CHANGELOG.md
@@ -1,5 +1,9 @@
# Changelog for the [`clash-vhdl`](http://hackage.haskell.org/package/clash-vhdl) package

## 0.5.10
* Fixes bugs:
* Maybe (Index n) not translatable to VHDL [#75](https://github.com/clash-lang/clash-compiler/issues/75)

## 0.5.9 *September 7th 2015*
* Fixes bugs:
* Bug in VHDL ROM generation [#69](https://github.com/clash-lang/clash-compiler/issues/69)
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2 changes: 1 addition & 1 deletion clash-vhdl/clash-vhdl.cabal
@@ -1,5 +1,5 @@
Name: clash-vhdl
Version: 0.5.9
Version: 0.5.10
Synopsis: CAES Language for Synchronous Hardware - VHDL backend
Description:
CλaSH (pronounced ‘clash’) is a functional hardware description language that
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1 change: 1 addition & 0 deletions clash-vhdl/src/CLaSH/Backend/VHDL.hs
Expand Up @@ -599,6 +599,7 @@ toSLV Integer e = "std_logic_vector" <> parens ("to_signed" <> tupled (sequ
toSLV (BitVector _) e = expr_ False e
toSLV (Signed _) e = "std_logic_vector" <> parens (expr_ False e)
toSLV (Unsigned _) e = "std_logic_vector" <> parens (expr_ False e)
toSLV (Index _) e = "std_logic_vector" <> parens (expr_ False e)
toSLV (Sum _ _) e = "std_logic_vector" <> parens (expr_ False e)
toSLV t@(Product _ tys) (Identifier id_ Nothing) = do
selIds' <- sequence selIds
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1 change: 1 addition & 0 deletions testsuite/Main.hs
Expand Up @@ -44,6 +44,7 @@ main =
, runTest ("tests" </> "shouldwork" </> "Basic") Both [] "Shift" (Just ("topEntity",False))
, runTest ("tests" </> "shouldwork" </> "Basic") Both [] "SimpleConstructor" (Just ("topEntity",False))
, runTest ("tests" </> "shouldwork" </> "Basic") Both [] "TagToEnum" (Just ("topEntity",False))
, runTest ("tests" </> "shouldwork" </> "Basic") Both [] "TestIndex" (Just ("topEntity",False))
, runTest ("tests" </> "shouldwork" </> "Basic") Both [] "TwoFunctions" (Just ("topEntity",False))
]
, testGroup "BitVector"
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