Support verilator in clash-testsuite
#2019
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alex-mckenna
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martijnbastiaan
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Jan 23, 2022
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| -- TODO: Since tasty doesn't provide one, we should really provide a better | ||
| -- set of combinators for describing test dependencies. That way we can have | ||
| -- some more principled way of having a test structure like |
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It's definitely Tasty's weakest point. Basically we already work our way around it by passing down names so we can construct the absolute name of the test at test location. It would be some much more intuitive if you could just do something like: TestGroupSeq [ ... ]. But alas..
clash-lib/src/Clash/Driver.hs
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| -- If we are generating (System)Verilog, we could potentially verilate | ||
| -- the results. Clash can output a C++ shim for doing this automatically. | ||
| fileNames2 <- | ||
| case hdl of | ||
| VHDL -> pure fileNames1 | ||
| _ -> writeVerilatorShim hdlDir topNm fileNames1 | ||
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| writeManifest manPath manifest0{fileNames=fileNames2} |
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I'd love for this to become a separate executable someday. It feel icky to have this all dumped in Driver.
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January 25, 2022 16:13
It is now possible to selectively enable tests which use a specific vendor tool by passing a flag to the testsuite driver, e.g. --verilator for running tests with verilator. If a tool is not given it's tests pass (as the tasty API does not allow deciding to skip a test inside IsTest.run). If the tool is not found the error is not tidied up instead of showing the contents of stderr. This is a somewhat crude first attempt at addressing #2012.
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This PR adds support for using
verilatorin (System)Verilog tests in the testsuite. This largely consists of changes to black boxes whichverilatordoes not support to include C++ definitions which can be used for simulation instead.Still TODO:
clockGenwhen thetbClockGenblack box is accepted