Merge pull request #1009 from bthebaudeau/use-additive-offsets

Use additive offsets
contiki-os · Mar 28, 2015 · a9f499e · a9f499e
2 parents c76316a + 19fd7a3
commit a9f499e
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Showing 7 changed files with 65 additions and 65 deletions.
diff --git a/cpu/cc2538/clock.c b/cpu/cc2538/clock.c
@@ -96,17 +96,17 @@ clock_init(void)
   REG(SYS_CTRL_RCGCGPT) |= SYS_CTRL_RCGCGPT_GPT0;
 
   /* Make sure GPT0 is off */
-  REG(GPT_0_BASE | GPTIMER_CTL) = 0;
+  REG(GPT_0_BASE + GPTIMER_CTL) = 0;
 
 
   /* 16-bit */
-  REG(GPT_0_BASE | GPTIMER_CFG) = 0x04;
+  REG(GPT_0_BASE + GPTIMER_CFG) = 0x04;
 
   /* One-Shot, Count Down, No Interrupts */
-  REG(GPT_0_BASE | GPTIMER_TAMR) = GPTIMER_TAMR_TAMR_ONE_SHOT;
+  REG(GPT_0_BASE + GPTIMER_TAMR) = GPTIMER_TAMR_TAMR_ONE_SHOT;
 
   /* Prescale by 16 (thus, value 15 in TAPR) */
-  REG(GPT_0_BASE | GPTIMER_TAPR) = 0x0F;
+  REG(GPT_0_BASE + GPTIMER_TAPR) = 0x0F;
 }
 /*---------------------------------------------------------------------------*/
 CCIF clock_time_t
@@ -144,11 +144,11 @@ clock_wait(clock_time_t i)
 void
 clock_delay_usec(uint16_t dt)
 {
-  REG(GPT_0_BASE | GPTIMER_TAILR) = dt;
-  REG(GPT_0_BASE | GPTIMER_CTL) |= GPTIMER_CTL_TAEN;
+  REG(GPT_0_BASE + GPTIMER_TAILR) = dt;
+  REG(GPT_0_BASE + GPTIMER_CTL) |= GPTIMER_CTL_TAEN;
 
   /* One-Shot mode: TAEN will be cleared when the timer reaches 0 */
-  while(REG(GPT_0_BASE | GPTIMER_CTL) & GPTIMER_CTL_TAEN);
+  while(REG(GPT_0_BASE + GPTIMER_CTL) & GPTIMER_CTL_TAEN);
 }
 /*---------------------------------------------------------------------------*/
 /**

diff --git a/cpu/cc2538/dev/gpio.c b/cpu/cc2538/dev/gpio.c
@@ -87,7 +87,7 @@ gpio_port_a_isr()
 
   ENERGEST_ON(ENERGEST_TYPE_IRQ);
 
-  notify(REG(GPIO_A_BASE | GPIO_MIS), GPIO_A_NUM);
+  notify(REG(GPIO_A_BASE + GPIO_MIS), GPIO_A_NUM);
 
   GPIO_CLEAR_INTERRUPT(GPIO_A_BASE, 0xFF);
   GPIO_CLEAR_POWER_UP_INTERRUPT(GPIO_A_NUM, 0xFF);
@@ -103,7 +103,7 @@ gpio_port_b_isr()
 
   ENERGEST_ON(ENERGEST_TYPE_IRQ);
 
-  notify(REG(GPIO_B_BASE | GPIO_MIS), GPIO_B_NUM);
+  notify(REG(GPIO_B_BASE + GPIO_MIS), GPIO_B_NUM);
 
   GPIO_CLEAR_INTERRUPT(GPIO_B_BASE, 0xFF);
   GPIO_CLEAR_POWER_UP_INTERRUPT(GPIO_B_NUM, 0xFF);
@@ -119,7 +119,7 @@ gpio_port_c_isr()
 
   ENERGEST_ON(ENERGEST_TYPE_IRQ);
 
-  notify(REG(GPIO_C_BASE | GPIO_MIS), GPIO_C_NUM);
+  notify(REG(GPIO_C_BASE + GPIO_MIS), GPIO_C_NUM);
 
   GPIO_CLEAR_INTERRUPT(GPIO_C_BASE, 0xFF);
   GPIO_CLEAR_POWER_UP_INTERRUPT(GPIO_C_NUM, 0xFF);
@@ -135,7 +135,7 @@ gpio_port_d_isr()
 
   ENERGEST_ON(ENERGEST_TYPE_IRQ);
 
-  notify(REG(GPIO_D_BASE | GPIO_MIS), GPIO_D_NUM);
+  notify(REG(GPIO_D_BASE + GPIO_MIS), GPIO_D_NUM);
 
   GPIO_CLEAR_INTERRUPT(GPIO_D_BASE, 0xFF);
   GPIO_CLEAR_POWER_UP_INTERRUPT(GPIO_D_NUM, 0xFF);

diff --git a/cpu/cc2538/dev/gpio.h b/cpu/cc2538/dev/gpio.h
@@ -91,28 +91,28 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_SET_INPUT(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_DIR) &= ~(PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_DIR) &= ~(PIN_MASK); } while(0)
 
 /** \brief Set pins with PIN_MASK of port with PORT_BASE to output.
 * \param PORT_BASE GPIO Port register offset
 * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
 */
 #define GPIO_SET_OUTPUT(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_DIR) |= (PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_DIR) |= (PIN_MASK); } while(0)
 
 /** \brief Set pins with PIN_MASK of port with PORT_BASE high.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_SET_PIN(PORT_BASE, PIN_MASK) \
-  do { REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2)) = 0xFF; } while(0)
+  do { REG((PORT_BASE) + GPIO_DATA + ((PIN_MASK) << 2)) = 0xFF; } while(0)
 
 /** \brief Set pins with PIN_MASK of port with PORT_BASE low.
 * \param PORT_BASE GPIO Port register offset
 * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
 */
 #define GPIO_CLR_PIN(PORT_BASE, PIN_MASK) \
-  do { REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2)) = 0x00; } while(0)
+  do { REG((PORT_BASE) + GPIO_DATA + ((PIN_MASK) << 2)) = 0x00; } while(0)
 
 /** \brief Set pins with PIN_MASK of port with PORT_BASE to value.
  * \param PORT_BASE GPIO Port register offset
@@ -133,7 +133,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
  * and then use 0x0A as the value ((1 << 3) | (1 << 1) for pins 3 and 1)
  */
 #define GPIO_WRITE_PIN(PORT_BASE, PIN_MASK, value) \
-  do { REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2)) = (value); } while(0)
+  do { REG((PORT_BASE) + GPIO_DATA + ((PIN_MASK) << 2)) = (value); } while(0)
 
 /** \brief Read pins with PIN_MASK of port with PORT_BASE.
  * \param PORT_BASE GPIO Port register offset
@@ -146,101 +146,101 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
  * the macro will return 0x81.
  */
 #define GPIO_READ_PIN(PORT_BASE, PIN_MASK) \
-  REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2))
+  REG((PORT_BASE) + GPIO_DATA + ((PIN_MASK) << 2))
 
 /** \brief Set pins with PIN_MASK of port with PORT_BASE to detect edge.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_DETECT_EDGE(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_IS) &= ~(PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_IS) &= ~(PIN_MASK); } while(0)
 
 /** \brief Set pins with PIN_MASK of port with PORT_BASE to detect level.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_DETECT_LEVEL(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_IS) |= (PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_IS) |= (PIN_MASK); } while(0)
 
 /** \brief Set pins with PIN_MASK of port with PORT_BASE to trigger an
  * interrupt on both edges.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_TRIGGER_BOTH_EDGES(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_IBE) |= (PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_IBE) |= (PIN_MASK); } while(0)
 
 /** \brief Set pins with PIN_MASK of port with PORT_BASE to trigger an
  * interrupt on single edge (controlled by GPIO_IEV).
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_TRIGGER_SINGLE_EDGE(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_IBE) &= ~(PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_IBE) &= ~(PIN_MASK); } while(0)
 
 /** \brief Set pins with PIN_MASK of port with PORT_BASE to trigger an
  * interrupt on rising edge.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_DETECT_RISING(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_IEV) |= (PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_IEV) |= (PIN_MASK); } while(0)
 
 /** \brief Set pins with PIN_MASK of port with PORT_BASE to trigger an
  * interrupt on falling edge.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_DETECT_FALLING(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_IEV) &= ~(PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_IEV) &= ~(PIN_MASK); } while(0)
 
 /** \brief Enable interrupt triggering for pins with PIN_MASK of port with
  * PORT_BASE.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_ENABLE_INTERRUPT(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_IE) |= (PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_IE) |= (PIN_MASK); } while(0)
 
 /** \brief Disable interrupt triggering for pins with PIN_MASK of port with
  * PORT_BASE.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_DISABLE_INTERRUPT(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_IE) &= ~(PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_IE) &= ~(PIN_MASK); } while(0)
 
 /** \brief Clear interrupt triggering for pins with PIN_MASK of port with
  * PORT_BASE.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_CLEAR_INTERRUPT(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_IC) = (PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_IC) = (PIN_MASK); } while(0)
 
 /** \brief Configure the pin to be under peripheral control with PIN_MASK of
  * port with PORT_BASE.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_PERIPHERAL_CONTROL(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_AFSEL) |= (PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_AFSEL) |= (PIN_MASK); } while(0)
 
 /** \brief Configure the pin to be software controlled with PIN_MASK of port
  * with PORT_BASE.
  * \param PORT_BASE GPIO Port register offset
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_SOFTWARE_CONTROL(PORT_BASE, PIN_MASK) \
-  do { REG((PORT_BASE) | GPIO_AFSEL) &= ~(PIN_MASK); } while(0)
+  do { REG((PORT_BASE) + GPIO_AFSEL) &= ~(PIN_MASK); } while(0)
 
 /** \brief Set pins with PIN_MASK of port PORT to trigger a power-up interrupt
  * on rising edge.
  * \param PORT GPIO Port (not port base address)
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_POWER_UP_ON_RISING(PORT, PIN_MASK) \
-  do { REG(GPIO_PORT_TO_BASE(PORT) | GPIO_P_EDGE_CTRL) &= \
+  do { REG(GPIO_PORT_TO_BASE(PORT) + GPIO_P_EDGE_CTRL) &= \
        ~((PIN_MASK) << ((PORT) << 3)); } while(0)
 
 /** \brief Set pins with PIN_MASK of port PORT to trigger a power-up interrupt
@@ -249,7 +249,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_POWER_UP_ON_FALLING(PORT, PIN_MASK) \
-  do { REG(GPIO_PORT_TO_BASE(PORT) | GPIO_P_EDGE_CTRL) |= \
+  do { REG(GPIO_PORT_TO_BASE(PORT) + GPIO_P_EDGE_CTRL) |= \
        (PIN_MASK) << ((PORT) << 3); } while(0)
 
 /** \brief Enable power-up interrupt triggering for pins with PIN_MASK of port
@@ -258,7 +258,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_ENABLE_POWER_UP_INTERRUPT(PORT, PIN_MASK) \
-  do { REG(GPIO_PORT_TO_BASE(PORT) | GPIO_PI_IEN) |= \
+  do { REG(GPIO_PORT_TO_BASE(PORT) + GPIO_PI_IEN) |= \
        (PIN_MASK) << ((PORT) << 3); } while(0)
 
 /** \brief Disable power-up interrupt triggering for pins with PIN_MASK of port
@@ -267,7 +267,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_DISABLE_POWER_UP_INTERRUPT(PORT, PIN_MASK) \
-  do { REG(GPIO_PORT_TO_BASE(PORT) | GPIO_PI_IEN) &= \
+  do { REG(GPIO_PORT_TO_BASE(PORT) + GPIO_PI_IEN) &= \
        ~((PIN_MASK) << ((PORT) << 3)); } while(0)
 
 /** \brief Clear power-up interrupt triggering for pins with PIN_MASK of port
@@ -276,7 +276,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
  * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
  */
 #define GPIO_CLEAR_POWER_UP_INTERRUPT(PORT, PIN_MASK) \
-  do { REG(GPIO_PORT_TO_BASE(PORT) | GPIO_IRQ_DETECT_ACK) = \
+  do { REG(GPIO_PORT_TO_BASE(PORT) + GPIO_IRQ_DETECT_ACK) = \
        (PIN_MASK) << ((PORT) << 3); } while(0)
 
 /**

diff --git a/cpu/cc2538/dev/nvic.c b/cpu/cc2538/dev/nvic.c
@@ -57,7 +57,7 @@ nvic_init()
   interrupt_unpend = (uint32_t *)NVIC_UNPEND0;
 
   /* Provide our interrupt table to the NVIC */
-  REG(SCB_VTABLE) = (NVIC_CONF_VTABLE_BASE | NVIC_CONF_VTABLE_OFFSET);
+  REG(SCB_VTABLE) = (NVIC_CONF_VTABLE_BASE + NVIC_CONF_VTABLE_OFFSET);
 }
 /*---------------------------------------------------------------------------*/
 void