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Strange phase noise #10
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Hi Dimitar, If the 1KHz rectangle signal have a slow edge(compare to the sample rate). There will be some sample points have a voltage(depends on the sample rate) between the min high threshold and the max low threshold. The sample result would be unpredictable. Even in the same channel, at the different time, the result may also be different. Thanks. |
Hello DreamSourceLab, Yes but having shifts 0 and 4 samples only between those two measurements is odd. Thanks |
There is no any phase adjustment in the FPGA design. |
Hi DreamSourceLab,
I have hooked both ch0 and ch1 to a single 1kHz rectangle signal set sampling to 100Mhz.
In the version 0.2.0 the relative jitter between the two shown signals was normally distributed I think.
Now with Rev 0.2.1 I see edges of the two signal coincide most of the time (so improvements in respect to 0.2 it seems) but from time to time I see 4 samples offset.
Have you changed something related in the FPGA?
If yes keep in mind that amplitude and phase filters the best is to be configurable and optional if possible.
Dimitar
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