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constraint file pin numbering comments for gp[] #6
Comments
HI
this was remains of my pin numbering required for kicad
to "understand" differential so my "logic" was to use odd
connector pins like j1_5 for the pair j1_5+ j1_5-
problem is with kicad, it would not "understand" that
j1_5+ j1_6- belong to the same differential pair because
in kicad, differential pins must be named the same except
being different by trailing - or +, then kicad autodetects this
as "pair".
But anyway, just ignore this J1_x+ pinning, use GP,N which is more logical
…On 3/16/19, gojimmypi ***@***.***> wrote:
Regarding the comments for the gp pins:
I'm wondering if perhaps there's a mistake in the numbering in the comments,
for example, [in the constraint
file](https://github.com/emard/ulx3s/blob/master/doc/constraints/ulx3s_v20.lpf#L389):
```
LOCATE COMP "gp[14]" SITE "U18"; # J2_5+ GP14 DIFF ADC1
LOCATE COMP "gn[14]" SITE "U17"; # J2_5- GN14 DIFF ADC0
```
specifically, I would have thought that `J2_5+` and `J2_5-` should instead
be labeled `J2_14+` and `J2_14-` (the differential numbering in the middle
of the connector; J2_5 appears to be the J2 connector pin number for GN14 =
U17)
or perhaps the comments should be `J2_5+` and `J2_6-` if using connector pin
numbers (then what does the `14` in the middle represent?)
from the schematic:
![image](https://user-images.githubusercontent.com/13059545/54471007-f0985300-476e-11e9-8a73-33022db6b9e4.png)
If not, then what exactly does the `5` mean in `J2_5+` and `J2_5-` ?
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#6
|
hm. yes, I see. I think I'll add some notes for clarification. PR coming soon. but on this topic, I'm wondering if perhaps the Note from the pic above, that differential pair 14 is near the end of the connector closest to Pin 1. As the 14 is near the bottom of J2, I assume this means the physical board numbering is reverse of that on the schematic, right? (this would make sense, since it is rotated 180 degrees as compared to J1. However, if indeed Pin 1 of J2 is at the bottom of the PC board near the Note the tiny For clarity, here's J2 schematic upside down, but oriented the same as viewing the PC board with the USB and DVI connectors at the top: The negative side of the differentials should be to the right, correct? (odd J2 pin numbers on the bottom of the connector as view in the pic) |
Pin 1 side left/right will be switched depending if connector
soldered is MALE or FEMALE board accepts both so some user
can solder MALE and find pinout OK, some user can solder FEMALE
and found pinout mirrored, or vice versa.
silkscreen markings on PCB should be self explainatory.
Outside pin row is differential +, inside pin row is differential -
Schematics symbol doesn't exactly map to physical appearance
of actual connector pins. I should have them mirrored/rotated probably
:)
…On 3/16/19, gojimmypi ***@***.***> wrote:
hm. yes, I see. I think I'll add some notes for clarification. PR coming
soon.
but on this topic, I'm wondering if perhaps the `- +` label on the PCB for
J2 might be reversed?
Note from the pic above, that differential pair 14 is near the end of the
connector closest to Pin 1. As the 14 is near the bottom of J2, I assume
this means the physical board numbering is reverse of that on the schematic,
right? (this would make sense, since it is rotated 180 degrees as compared
to J1.
![image](https://user-images.githubusercontent.com/13059545/54478922-d5f8c500-47d4-11e9-811c-b74784c231b6.png)
However, if indeed Pin 1 of J2 is at the bottom of the PC board near the
`3.3+`, that would make pin one, and all the odd numbers of J2, the
negative side of the differential, right?
Note the tiny `- +` printed on the board between the `14` and `15` of J2.
For clarity, here's J2 schematic upside down, but oriented the same as
viewing the PC board with the USB and DVI connectors at the top:
![image](https://user-images.githubusercontent.com/13059545/54479000-d47bcc80-47d5-11e9-9439-19ecb83f7568.png)
The negative side of the differentials should be to the right, correct? (odd
J2 pin numbers on the bottom of the connector as view in the pic)
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#6 (comment)
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yes, I did find that the silkscreen on the board is correct - but the schematic is not? It does appear all of the even numbers are GNxx; (as indicated by the For me, this became most evident when my AD/DA was not doing any conversions. I found the CLK on pin 29 of my board, needed to be connected to GN14 on pin 6, even though pin 6 (on the inverted J2 image, above) is labeled as GP14. It is certainly good news that the silkscreen is correct. Unfortunately I was working from the schematic for quite some time before I realized that. I've certainly had my share of where is pin 1 issues over the years... ;) however that was usually with the cable. Regardless of male or female connector, pin one on the PC board remains the same, no? I do believe all the P/N notations on the schematic are reversed - and it would be really great to also invert the connector on the schematic to reflect the inverted orientation on the PC board, do you agree? As further evidence, check out this view of the KiCad, J2 from above - viewing front of board: And here it is rotated 180 degrees: Note this view is from the top of the board. The only way that pin 1 would be on the left when looking from above, is if in fact the connector was on the back of the board. Do you agree? (see also this pic on wikipedia) Also: Perhaps on the next version of silkscreen, you could add something to make pin 1 abundantly obvious? If you agree with all this, I'd be happy to implement and submit a PR :) Edit: it appears J1 is also reversed. Admittedly, I soldered on my own header - but surely the side with the display and connectors is considered "top" no? The only way for this numbering to work is to solder the connector on (what I would consider) the "back" of the board: Edit 2: replaced above pic to show the "front" (F.Cu) of the board in KiCad, with the numbering reversed, expected to have the header on the back? |
It is possible that I made a male/female mismatch of schematic
symbol for header and the footprint of the header.
Kicad allows to mix everything and supposes the user knows what to do.
My personal preference is that pin numbering is for the straight male pins.
Then pin 1 of the cable (suppose you use IDE/CDROM 40pin cable) will
match pin 1 at the board markings
WHen using 90° female angled connectors, then usually nobody has cable
with male pins that can plug in female headers. It is
supposed to plug PMOD male connectors which have completely
unexpected pin numbering you don't want to know...
…On 3/18/19, gojimmypi ***@***.***> wrote:
yes, I did find that the _silkscreen on the board **is** correct_ - but the
schematic is not? It does appear all of the _**even**_ numbers are G**N**xx;
(as indicated by the `- +` on the J2 silkscreen) and the **_odd_** pin
numbers, closest to the edge of the board are G**P**xx (of `J2`, I did not
check `J1`).
For me, this became most evident when my AD/DA was not doing any
conversions. I found the CLK on pin 29 of my board, needed to be connected
to [GN14 on pin
6](https://github.com/gojimmypi/ulx3s-adda/blob/development/ulx3s_v20.lpf#L492),
even though pin 6 (on the inverted J2 image, above) is labeled as G**P**14.
It is certainly good news that the silkscreen is correct. Unfortunately I
was working from the schematic for quite some time before I realized that.
I've certainly had my share of _where is pin 1_ issues over the years... ;)
however that was usually with the cable. Regardless of male or female
connector, pin one on the PC board remains the same, no? I do believe all
the P/N notations on the schematic are reversed - and it would be really
great to also invert the connector on the schematic to reflect the inverted
orientation on the PC board, do you agree?
As further evidence, check out this view of the KiCad, J2 from above -
viewing front of board:
![image](https://user-images.githubusercontent.com/13059545/54499429-e42b0c00-48ce-11e9-8685-6e3b5df23da0.png)
And here it is rotated 180 degrees:
![image](https://user-images.githubusercontent.com/13059545/54499437-15a3d780-48cf-11e9-87a4-ea5ce181e3bf.png)
Note this view is from the top of the board. The only way that pin 1 would
be on the left when looking from above, is if in fact the connector was on
the back of the board. Do you agree? (see also [this
pic](https://en.wikipedia.org/wiki/Pin_header#/media/File:Stiftwanne2x13v2.jpg)
on wikipedia)
Also: Perhaps on the next version of silkscreen, you could add something to
make pin 1 abundantly obvious?
If you agree with all this, I'd be happy to implement and submit a PR :)
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#6 (comment)
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I'm looking again at the schematics -> I'd say pins on both
schematics and pcb footprint are consistenly numbered for
female 90° angled connectors.
If you soldered straight male pin header, even and odd numbering
will swap sides.
…On 3/18/19, D EMARD ***@***.***> wrote:
It is possible that I made a male/female mismatch of schematic
symbol for header and the footprint of the header.
Kicad allows to mix everything and supposes the user knows what to do.
My personal preference is that pin numbering is for the straight male pins.
Then pin 1 of the cable (suppose you use IDE/CDROM 40pin cable) will
match pin 1 at the board markings
WHen using 90° female angled connectors, then usually nobody has cable
with male pins that can plug in female headers. It is
supposed to plug PMOD male connectors which have completely
unexpected pin numbering you don't want to know...
On 3/18/19, gojimmypi ***@***.***> wrote:
> yes, I did find that the _silkscreen on the board **is** correct_ - but
> the
> schematic is not? It does appear all of the _**even**_ numbers are
> G**N**xx;
> (as indicated by the `- +` on the J2 silkscreen) and the **_odd_** pin
> numbers, closest to the edge of the board are G**P**xx (of `J2`, I did
> not
> check `J1`).
>
> For me, this became most evident when my AD/DA was not doing any
> conversions. I found the CLK on pin 29 of my board, needed to be
> connected
> to [GN14 on pin
> 6](https://github.com/gojimmypi/ulx3s-adda/blob/development/ulx3s_v20.lpf#L492),
> even though pin 6 (on the inverted J2 image, above) is labeled as
> G**P**14.
>
> It is certainly good news that the silkscreen is correct. Unfortunately I
> was working from the schematic for quite some time before I realized
> that.
>
> I've certainly had my share of _where is pin 1_ issues over the years...
> ;)
> however that was usually with the cable. Regardless of male or female
> connector, pin one on the PC board remains the same, no? I do believe all
> the P/N notations on the schematic are reversed - and it would be really
> great to also invert the connector on the schematic to reflect the
> inverted
> orientation on the PC board, do you agree?
>
> As further evidence, check out this view of the KiCad, J2 from above -
> viewing front of board:
>
> ![image](https://user-images.githubusercontent.com/13059545/54499429-e42b0c00-48ce-11e9-8685-6e3b5df23da0.png)
>
> And here it is rotated 180 degrees:
>
> ![image](https://user-images.githubusercontent.com/13059545/54499437-15a3d780-48cf-11e9-87a4-ea5ce181e3bf.png)
>
> Note this view is from the top of the board. The only way that pin 1
> would
> be on the left when looking from above, is if in fact the connector was
> on
> the back of the board. Do you agree? (see also [this
> pic](https://en.wikipedia.org/wiki/Pin_header#/media/File:Stiftwanne2x13v2.jpg)
> on wikipedia)
>
> Also: Perhaps on the next version of silkscreen, you could add something
> to
> make pin 1 abundantly obvious?
>
> If you agree with all this, I'd be happy to implement and submit a PR :)
>
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> Reply to this email directly or view it on GitHub:
> #6 (comment)
|
Well, I don't mean to be so persistent that I am annoying - but respectfully, I disagree. :) I'm also certainly willing to be wrong. For one, I do not believe that changing between male and female headers changes the numbering scheme on the board. I think the reversal you are thinking of, is looking at the cable connector, or the device connector. First, do we agree the "Front" of the ULX3S is as labeled in KiCad - the side with the display and connectors? Let's take a look at another example, the J8 header mounted on the front of the board for the Raspbettery Pi. See the Schematic: Pin 1 is in the same position on the physical board of the RPi, (to the left when looking down at the connector on the front of the board) regardless of male or female connector that may be soldered on, as well as regardless of straight or angled. Agreed? And here's where they document Pin 1 as the 3v3 for the header, which would be Pin 1 for a male or female connector when the header is mounted on top of the board: For reference, here's a Molex angled connector from Mouser: I drew the red connection showing pin 1 reference, assuming the same orientation as the RPi connector, above. In both the case of looking down at the PC board, or looking at the connector, Pin 1 is to the left. I think the issue with ribbon cables, is more whether they have the connector crimped on upside-down or not. Here's a random female connector ribbon cable from superuser (which I agree are the most common and the headers should be male). In this case, I assume we are looking into to holes of the connector, and is completely consistent with the numbering shown above. Note how Pin 1 is to the right when looking at the cable connector, but to the left looking at the device header (PC Board ). You'd flip this cable upside down to plug it in to the Molex sample above, and both Pin 1's would align. So returning to our example of the ULX3S, the only way for Pin 1 to be to the right on the PC Board here, assuming we are looking at the front of the board, is to have the header mounted on the back of the board: Note for the cable pic shown above, the only way for Pin 1 to align is to plug the cable into the bottom of the board, exactly as oriented in both pictures. My apologies if you believe I am wrong... I'm only looking for accuracy here - and to hopefully help others others avoid the frustration I had over the weekend. If you still believe that I am incorrect - I am certainly willing to listen, if you can show me otherwise :) |
Aha - you know... I stand corrected. Indeed if the on-board connector is female, Pin 1 is to the right as shown in this Mouser datasheet I was too fixated on the standard male header, above - and even missed this part when you mentioned the PMODs (which are male and expect a female header). I wonder if the header should be male like most dev boards, particularly with something that looks like a ribbon cable connector, with PMOD adapters? That way end users can have breakouts like the ones for the Raspberry Pi's such as this one from Adafruit Well, thanks for checking. :) |
But wait! (oh no, I think I am going crazy) The original issue was regarding the reversal on the schematic. Note on the schematic, Pin 1 is drawn to the left (the standard for male header), but on the PC Board, Pin 1 is on the right (expecting a female connector). My whole point was to be consistent, as I was following the schematic, incorrectly assuming it was also a physical wiring diagram - but note the GN/GP for differential pair 14: The original issue was how the silkscreen |
this is my "conversion scheme" for J+-
J2_5- -> J2_5
J2_5+ -> J2_6
The silkcreen markings +/- should be consistent with digital
differential +/- for FPGA, but are OPPOSITE for differential mode
of ADC
if you use ADC in differential mode, it is of course connected
shared on pins GP/N14-17. What is + for digital FPGA pins is -
for ADC in differential mode and vice versa
However (I now not sure but I _think_ that) binary numbers obtained
from ADC are also reversed. Connecting + voltage to ADC+ and - voltage
to ADC- will obtain lower hex values, and reverse the higher values.
So now wonder have I reversed reversed - + and got correct HEX? :)?
You know what's difference between good and bad scientist?
Good scientist makes wrong sign even number of times :)
…On 3/18/19, gojimmypi ***@***.***> wrote:
But wait! (oh no, I think I am going crazy) The original issue was regarding
the _reversal on the schematic_. Note on the schematic, Pin 1 is drawn to
the left (the standard for male header), but on the PC Board, Pin 1 is on
the right (expecting a female connector).
My whole point was to be consistent, as I was following the schematic,
incorrectly assuming it was also a physical wiring diagram - but note the
P/N for #14:
![image](https://user-images.githubusercontent.com/13059545/54548773-e0969400-4965-11e9-8ba1-96223cd5b2e5.png)
The original issue was how the silkscreen `- +` _is_ correct. Note the first
message for this issue (above): you comment in the constraint file that
`SITE "U18"; # J2_5+ ` but the positive differential is actually on Pin 6,
no? Pin 5 is labeled on the schematic as `GN14`
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Well, I certainly appreciate your patience here... Clearly I've not been very effective in communicating the issue. ;) First: Ironically, despite the GP/N14 differential pins in question being ADC pins, I am not actually using them for that. My AD/DA converter is external, connected to the ULX3S as shown here and in operation here - having nothing to do with the fact that those ULX3S pins are also differential A/D pins (I was referring to the general topic of differential P/N for all naming of the pins). The issue I am trying to convey is the schematic has Pin 1 reversed, shown on the left, and the PC Board has Pin 1 on the right: So for instance when looking at the schematic for GN14, I connected my wire here: Which I thought was this position on the header, Pin 5: But the PC Board (Female connector as you noted) has that numbered as Pin 6 for both J1: and J2: Pin 6 is actually GP14, correctly noted on schematic, but illustrated on the opposite side when actually viewing the connector. |
Your image snapshots are referring to old schematics
New schematics have mirrored/rotated the connectors
that in my kicad and PDF now look the same,
are numbered the same and are rotated to visually
match the same appearance as physical pins when
viewed from above of the PCB (buttons side up).
I hope now this is easier to read. Tell me if you still can
find any difference of mis-leading facts?
…On 3/18/19, gojimmypi ***@***.***> wrote:
Well, I certainly appreciate your patience here... Clearly I've not been
very effective in communicating the issue. ;)
First: Ironically, despite the GP/N14 differential pins in question being
_ADC pins_, I am not actually _using_ them for that. My AD/DA converter is
_external_, connected to the ULX3S as shown
[here](https://github.com/gojimmypi/ulx3s-adda/blob/development/doc/ribbon-cable-ADDA-bottom.PNG)
and in operation
[here](https://twitter.com/gojimmypi/status/1107054057125040128) - having
nothing to do with the fact that those ULX3S pins are also differential A/D
pins (I was referring to the general topic of differential P/N for all
naming of the pins).
The issue I am trying to convey is the schematic has Pin 1 reversed, shown
on the left, and the PC Board has Pin 1 on the right:
![image](https://user-images.githubusercontent.com/13059545/54557995-c5358400-4979-11e9-9874-c66546811f59.png)
So for instance when looking at the schematic for GN14, I connected my wire
here:
![image](https://user-images.githubusercontent.com/13059545/54557648-e9dd2c00-4978-11e9-89b8-374000384787.png)
Which I thought was this position on the header, Pin 5:
![image](https://user-images.githubusercontent.com/13059545/54557744-23159c00-4979-11e9-9ec3-3d497e21c80b.png)
But the PC Board (Female connector as you noted) has that numbered as Pin 6
for both J1:
![image](https://user-images.githubusercontent.com/13059545/54558248-7dfbc300-497a-11e9-9fa4-5a4b24bd2ab3.png)
and J2:
![image](https://user-images.githubusercontent.com/13059545/54558264-8653fe00-497a-11e9-84ab-87e100612ce6.png)
Pin 6 is actually G**P**14, correctly noted on schematic, but illustrated on
the opposite side when actually viewing the connector.
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old? OLD!? LOL. You mean "old" as in the version prior to the one you edited just yesterday?? ;) well then: yes! that's great! :) Just like that. (and yes, I feel rather silly for ranting on above, but in the end, it appears you agreed with me that the old schematic was misleading). I did see your changes yesterday regarding default page orientation and text searching - both excellent updates - but I had not noticed the connector changes! This is great, much more helpful: Thank you for making those changes. :) |
Yes it's OLD there were few updates today :)
Pin numbering remains but it's now rotated and mirrored
for a more intuitive reference to the PCB.
…On 3/18/19, gojimmypi ***@***.***> wrote:
old? _OLD_!? LOL. You mean "old" as in the [version
prior](2dba7d3#diff-1bc2b848c551ed479ade97c29b69f1ce)
to the one you [edited just
yesterday](a639b5e#diff-1bc2b848c551ed479ade97c29b69f1ce)??
;)
well then: yes! that's great! :) Just like that. (and yes, I feel rather
silly for ranting on above, but in the end, it appears you agreed with me
that the _old_ schematic was misleading).
I did see your changes yesterday regarding default page orientation and text
searching - both excellent updates - but I had not noticed the connector
changes!
This is great, much more helpful:
![image](https://user-images.githubusercontent.com/13059545/54564735-c5d61680-4989-11e9-8f89-e9ff940d6500.png)
![image](https://user-images.githubusercontent.com/13059545/54564912-3ed56e00-498a-11e9-8da8-065e8cb1b977.png)
Thank you for making those changes. :)
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yes, indeed. :) Regarding this comment, from above:
I wonder if perhaps since this was your "logic" - perhaps the notation should be removed from the constraint file? (using the rationale that if it was confusing to me, it may be to others as well?) Or clarified: I do agree btw - you may with to add some text to the schematic that states why the default as shown is a female connector, specifically to accommodate PMOD connectors without an adapter. |
HI
I prefer to keep Jm_n+- notation for now, in the constraints
file before GP/N I have added comments with examples
that describe how to convert J1_5+ to J1_5 or J1_6, depeding
on connector type.
…On 3/19/19, gojimmypi ***@***.***> wrote:
yes, indeed. :)
Regarding this comment, from above:
> this was remains of my pin numbering required for kicad to "understand"
> differential so my "logic" was to use odd connector pins like j1_5 for the
> pair j1_5+ j1_5- problem is with kicad, it would not "understand" that
> j1_5+ j1_6- belong to the same differential pair because in kicad,
> differential pins must be named the same except being different by
> trailing - or +, then kicad autodetects this as "pair". But anyway, just
> ignore this J1_x+ pinning, use GP,N which is more logical
I wonder if perhaps since this was _your "logic"_ - perhaps the notation
should be removed from the constraint file? (using the rationale that if it
was confusing to me, it may be to others as well?) Or clarified: `J1_5_6+`
and `J1_5_6-` - particularly now that the note had been added to the
schematic about the change in numbering based on a male or female header.
I do agree `GP,N` is more logical.
btw - you may with to add some text to the schematic that states _why_ the
default as shown is a female connector, specifically to accommodate PMOD
connectors without an adapter.
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#6 (comment)
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This is GR_PCLK a single ended
General Routing Primary Clock capable pin
It's the only clock capable pin at J2
It can receive or transmit clock but with small delay
For minimum possible delay there are pins labeled as PCLKT/C
those are true Primary Clock capable differential pins more of them
are on J1
…On 3/19/19, gojimmypi ***@***.***> wrote:
Hi, ok.
so while I have your attention... :)
can you tell me the significance of `GR_PCLK3_0`
![image](https://user-images.githubusercontent.com/13059545/54619593-17ca7b00-4a22-11e9-96d7-ec84067248fd.png)
Is this simply a work in progress? Other pins have similar labels that could
be added (and imho, would be cool to have them indicated). Just wondering if
there's any importance to this particular one?
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and btw this schematics is also OLD, due to rotation
of J1 and J2 this label temporarily shifted to wrong place :)
refresh new PDF this GR clock should be at GP17 :)
…On 3/19/19, D EMARD ***@***.***> wrote:
This is GR_PCLK a single ended
General Routing Primary Clock capable pin
It's the only clock capable pin at J2
It can receive or transmit clock but with small delay
For minimum possible delay there are pins labeled as PCLKT/C
those are true Primary Clock capable differential pins more of them
are on J1
On 3/19/19, gojimmypi ***@***.***> wrote:
> Hi, ok.
>
> so while I have your attention... :)
>
> can you tell me the significance of `GR_PCLK3_0`
>
> ![image](https://user-images.githubusercontent.com/13059545/54619593-17ca7b00-4a22-11e9-96d7-ec84067248fd.png)
>
> Is this simply a work in progress? Other pins have similar labels that
> could
> be added (and imho, would be cool to have them indicated). Just wondering
> if
> there's any importance to this particular one?
>
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hello @emard - I noticed this issue from several months ago is still open. I think you resolved this with the latest schematic updates? As I opened this issue - are you waiting on me to close it or is it left open for some other reason? cheers |
Yes close it :)
…On 6/6/19, gojimmypi ***@***.***> wrote:
hello @emard - I noticed this issue from several months ago is still open. I
think you [resolved this with the latest schematic
updates](#6 (comment))? As
I opened this issue - are you waiting on me to close it or is it left open
for some other reason?
cheers
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thank you for the schematic updates :) |
HI
I ordered one
AD9280 + AD9708 AD / DA Module for AX series FPGA Development Board
and I'm thinking of adapting hdl4fpga scopeio for this ADC
do you have some extra PCB adapter to send me?
…On 6/6/19, gojimmypi ***@***.***> wrote:
thank you for the schematic updates :)
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#6 (comment)
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Hello @emard - yes, for you - certainly! Thank you again for all your help and patience as I learn some of this stuff. Send me a gmail dot com; email same as my github name. I have extra headers that I can include and/or solder on for you, if you'd like. For reference, my KiCad docs for this board are still on the development branch of my ulx3s-adda project. Which reminds me: I think I need to make my OshPark project public. I was really quite happy with myself in getting this initial pass-through working: I am looking forward to seeing what you can do with that AD/DA board! The ScopeIO project looks very cool. |
Regarding the comments for the gp pins:
I'm wondering if perhaps there's a mistake in the numbering in the comments, for example, in the constraint file:
specifically, I would have thought that
J2_5+
andJ2_5-
should instead be labeledJ2_14+
andJ2_14-
(the differential numbering in the middle of the connector; J2_5 appears to be the J2 connector pin number for GN14 = U17)or perhaps the comments should be
J2_5+
andJ2_6-
if using connector pin numbers (then what does the14
in the middle represent?)from the schematic:
If not, then what exactly does the
5
mean inJ2_5+
andJ2_5-
?The text was updated successfully, but these errors were encountered: