Revert "Misra 10 1: Operands shall not be of an inappropriate essenti…

…al type (commaai#232)"

This reverts commit 8732e4f.

board/config.h

@@ -12,12 +12,12 @@
   #include "stm32f2xx.h"
 #endif
 
-#define USB_VID 0xbbaaU
+#define USB_VID 0xbbaa
 
 #ifdef BOOTSTUB
-#define USB_PID 0xddeeU
+#define USB_PID 0xddee
 #else
-#define USB_PID 0xddccU
+#define USB_PID 0xddcc
 #endif
 
 #include <stdbool.h>

board/drivers/adc.h

@@ -19,7 +19,7 @@ void adc_init(void) {
   ADC1->SMPR1 = ADC_SMPR1_SMP12 | ADC_SMPR1_SMP13;
 }
 
-uint32_t adc_get(unsigned int channel) {
+uint32_t adc_get(int channel) {
   // includes length
   //ADC1->SQR1 = 0;
 

board/drivers/can.h

@@ -9,8 +9,8 @@ typedef struct {
   CAN_FIFOMailBox_TypeDef *elems;
 } can_ring;
 
-#define CAN_BUS_RET_FLAG 0x80U
-#define CAN_BUS_NUM_MASK 0x7FU
+#define CAN_BUS_RET_FLAG 0x80
+#define CAN_BUS_NUM_MASK 0x7F
 
 #define BUS_MAX 4
 
@@ -130,7 +130,7 @@ void can_set_speed(uint8_t can_number) {
   CAN_TypeDef *CAN = CANIF_FROM_CAN_NUM(can_number);
   uint8_t bus_number = BUS_NUM_FROM_CAN_NUM(can_number);
 
-  if (!llcan_set_speed(CAN, can_speed[bus_number], can_loopback, can_silent & (1U << can_number))) {
+  if (!llcan_set_speed(CAN, can_speed[bus_number], can_loopback, can_silent & (1 << can_number))) {
     puts("CAN init FAILED!!!!!\n");
     puth(can_number); puts(" ");
     puth(BUS_NUM_FROM_CAN_NUM(can_number)); puts("\n");
@@ -249,7 +249,7 @@ void process_can(uint8_t can_number) {
         if ((CAN->TSR & CAN_TSR_TXOK0) == CAN_TSR_TXOK0) {
           CAN_FIFOMailBox_TypeDef to_push;
           to_push.RIR = CAN->sTxMailBox[0].TIR;
-          to_push.RDTR = (CAN->sTxMailBox[0].TDTR & 0xFFFF000FU) | ((CAN_BUS_RET_FLAG | bus_number) << 4);
+          to_push.RDTR = (CAN->sTxMailBox[0].TDTR & 0xFFFF000F) | ((CAN_BUS_RET_FLAG | bus_number) << 4);
           to_push.RDLR = CAN->sTxMailBox[0].TDLR;
           to_push.RDHR = CAN->sTxMailBox[0].TDHR;
           can_push(&can_rx_q, &to_push);

board/drivers/gmlan_alt.h

@@ -41,16 +41,16 @@ int do_bitstuff(char *out, char *in, int in_len) {
 }
 
 int append_crc(char *in, int in_len) {
-  unsigned int crc = 0;
+  int crc = 0;
   for (int i = 0; i < in_len; i++) {
     crc <<= 1;
-    if ((in[i] ^ ((crc >> 15) & 1U)) != 0) {
-      crc = crc ^ 0x4599U;
+    if ((in[i] ^ ((crc >> 15) & 1)) != 0) {
+      crc = crc ^ 0x4599;
     }
-    crc &= 0x7fffU;
+    crc &= 0x7fff;
   }
   for (int i = 14; i >= 0; i--) {
-    in[in_len] = (crc >> (unsigned int)(i)) & 1U;
+    in[in_len] = (crc>>i)&1;
     in_len++;
   }
   return in_len;
@@ -66,7 +66,7 @@ int append_bits(char *in, int in_len, char *app, int app_len) {
 
 int append_int(char *in, int in_len, int val, int val_len) {
   for (int i = val_len-1; i >= 0; i--) {
-    in[in_len] = ((unsigned int)(val) & (1U << (unsigned int)(i))) != 0;
+    in[in_len] = (val&(1<<i)) != 0;
     in_len++;
   }
   return in_len;
@@ -92,7 +92,7 @@ int get_bit_message(char *out, CAN_FIFOMailBox_TypeDef *to_bang) {
     // extended identifier
     len = append_int(pkt, len, to_bang->RIR >> 21, 11);  // Identifier
     len = append_int(pkt, len, 3, 2);    // SRR+IDE
-    len = append_int(pkt, len, (to_bang->RIR >> 3) & ((1U << 18) - 1), 18);  // Identifier
+    len = append_int(pkt, len, (to_bang->RIR >> 3) & ((1<<18)-1), 18);  // Identifier
     len = append_int(pkt, len, 0, 3);    // RTR+r1+r0
   } else {
     // standard identifier
@@ -168,9 +168,9 @@ void reset_gmlan_switch_timeout(void) {
 
 void set_bitbanged_gmlan(int val) {
   if (val != 0) {
-    GPIOB->ODR |= (1U << 13);
+    GPIOB->ODR |= (1 << 13);
   } else {
-    GPIOB->ODR &= ~(1U << 13);
+    GPIOB->ODR &= ~(1 << 13);
   }
 }
 

board/drivers/llgpio.h

@@ -7,38 +7,38 @@
 #define PULL_UP 1
 #define PULL_DOWN 2
 
-void set_gpio_mode(GPIO_TypeDef *GPIO, unsigned int pin, unsigned int mode) {
+void set_gpio_mode(GPIO_TypeDef *GPIO, int pin, int mode) {
   uint32_t tmp = GPIO->MODER;
-  tmp &= ~(3U << (pin * 2U));
-  tmp |= (mode << (pin * 2U));
+  tmp &= ~(3 << (pin*2));
+  tmp |= (mode << (pin*2));
   GPIO->MODER = tmp;
 }
 
-void set_gpio_output(GPIO_TypeDef *GPIO, unsigned int pin, bool enabled) {
+void set_gpio_output(GPIO_TypeDef *GPIO, int pin, bool enabled) {
   if (enabled) {
-    GPIO->ODR |= (1U << pin);
+    GPIO->ODR |= (1 << pin);
   } else {
-    GPIO->ODR &= ~(1U << pin);
+    GPIO->ODR &= ~(1 << pin);
   }
   set_gpio_mode(GPIO, pin, MODE_OUTPUT);
 }
 
-void set_gpio_alternate(GPIO_TypeDef *GPIO, unsigned int pin, unsigned int mode) {
-  uint32_t tmp = GPIO->AFR[pin >> 3U];
-  tmp &= ~(0xFU << ((pin & 7U) * 4U));
-  tmp |= mode << ((pin & 7U) * 4U);
-  GPIO->AFR[pin >> 3] = tmp;
+void set_gpio_alternate(GPIO_TypeDef *GPIO, int pin, int mode) {
+  uint32_t tmp = GPIO->AFR[pin>>3];
+  tmp &= ~(0xF << ((pin&7)*4));
+  tmp |= mode << ((pin&7)*4);
+  GPIO->AFR[pin>>3] = tmp;
   set_gpio_mode(GPIO, pin, MODE_ALTERNATE);
 }
 
-void set_gpio_pullup(GPIO_TypeDef *GPIO, unsigned int pin, unsigned int mode) {
+void set_gpio_pullup(GPIO_TypeDef *GPIO, int pin, int mode) {
   uint32_t tmp = GPIO->PUPDR;
-  tmp &= ~(3U << (pin * 2U));
-  tmp |= (mode << (pin * 2U));
+  tmp &= ~(3 << (pin*2));
+  tmp |= (mode << (pin*2));
   GPIO->PUPDR = tmp;
 }
 
-int get_gpio_input(GPIO_TypeDef *GPIO, unsigned int pin) {
+int get_gpio_input(GPIO_TypeDef *GPIO, int pin) {
   return (GPIO->IDR & (1U << pin)) == (1U << pin);
 }
 

board/drivers/spi.h

@@ -28,8 +28,8 @@ void spi_init(void) {
 
   // setup interrupt on falling edge of SPI enable (on PA4)
   SYSCFG->EXTICR[2] = SYSCFG_EXTICR2_EXTI4_PA;
-  EXTI->IMR |= (1U << 4);
-  EXTI->FTSR |= (1U << 4);
+  EXTI->IMR |= (1 << 4);
+  EXTI->FTSR |= (1 << 4);
   NVIC_EnableIRQ(EXTI4_IRQn);
 }
 
@@ -113,12 +113,12 @@ void DMA2_Stream3_IRQHandler(void) {
 }
 
 void EXTI4_IRQHandler(void) {
-  volatile int pr = EXTI->PR & (1U << 4);
+  volatile int pr = EXTI->PR & (1 << 4);
   #ifdef DEBUG_SPI
     puts("exti4\n");
   #endif
   // SPI CS falling
-  if ((pr & (1U << 4)) != 0) {
+  if ((pr & (1 << 4)) != 0) {
     spi_total_count = 0;
     spi_rx_dma(spi_buf, 0x14);
   }

board/drivers/uart.h

@@ -200,12 +200,12 @@ void clear_uart_buff(uart_ring *q) {
 #define __DIVFRAQ(_PCLK_, _BAUD_)                    ((((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16) + 50) / 100)
 #define __USART_BRR(_PCLK_, _BAUD_)              ((__DIVMANT((_PCLK_), (_BAUD_)) << 4) | (__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))
 
-void uart_set_baud(USART_TypeDef *u, unsigned int baud) {
+void uart_set_baud(USART_TypeDef *u, int baud) {
   if (u == USART1) {
     // USART1 is on APB2
-    u->BRR = __USART_BRR(48000000U, baud);
+    u->BRR = __USART_BRR(48000000, baud);
   } else {
-    u->BRR = __USART_BRR(24000000U, baud);
+    u->BRR = __USART_BRR(24000000, baud);
   }
 }
 
@@ -330,15 +330,15 @@ void puth(unsigned int i) {
   int pos;
   char c[] = "0123456789abcdef";
   for (pos = 28; pos != -4; pos -= 4) {
-    putch(c[(i >> (unsigned int)(pos)) & 0xFU]);
+    putch(c[(i >> pos) & 0xF]);
   }
 }
 
 void puth2(unsigned int i) {
   int pos;
   char c[] = "0123456789abcdef";
   for (pos = 4; pos != -4; pos -= 4) {
-    putch(c[(i >> (unsigned int)(pos)) & 0xFU]);
+    putch(c[(i >> pos) & 0xF]);
   }
 }
 

board/drivers/usb.h

@@ -96,7 +96,7 @@ USB_OTG_GlobalTypeDef *USBx = USB_OTG_FS;
 #define STS_SETUP_COMP                         4
 #define STS_SETUP_UPDT                         6
 
-#define USBD_FS_TRDT_VALUE           5U
+#define USBD_FS_TRDT_VALUE           5
 
 #define USB_OTG_SPEED_FULL 3
 
@@ -125,7 +125,7 @@ uint8_t resp[MAX_RESP_LEN];
 
 // Convert machine byte order to USB byte order
 #define TOUSBORDER(num)\
-  ((num) & 0xFFU), (((num) >> 8) & 0xFFU)
+  ((num) & 0xFF), (((num) >> 8) & 0xFF)
 
 // take in string length and return the first 2 bytes of a string descriptor
 #define STRING_DESCRIPTOR_HEADER(size)\
@@ -158,7 +158,7 @@ uint8_t device_qualifier[] = {
 
 uint8_t configuration_desc[] = {
   DSCR_CONFIG_LEN, USB_DESC_TYPE_CONFIGURATION, // Length, Type,
-  TOUSBORDER(0x0045U), // Total Len (uint16)
+  TOUSBORDER(0x0045), // Total Len (uint16)
   0x01, 0x01, STRING_OFFSET_ICONFIGURATION, // Num Interface, Config Value, Configuration
   0xc0, 0x32, // Attributes, Max Power
   // interface 0 ALT 0
@@ -169,17 +169,17 @@ uint8_t configuration_desc[] = {
     // endpoint 1, read CAN
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_RCV | 1, ENDPOINT_TYPE_BULK, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040U), // Max Packet (0x0040)
+    TOUSBORDER(0x0040), // Max Packet (0x0040)
     0x00, // Polling Interval (NA)
     // endpoint 2, send serial
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_SND | 2, ENDPOINT_TYPE_BULK, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040U), // Max Packet (0x0040)
+    TOUSBORDER(0x0040), // Max Packet (0x0040)
     0x00, // Polling Interval
     // endpoint 3, send CAN
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_SND | 3, ENDPOINT_TYPE_BULK, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040U), // Max Packet (0x0040)
+    TOUSBORDER(0x0040), // Max Packet (0x0040)
     0x00, // Polling Interval
   // interface 0 ALT 1
   DSCR_INTERFACE_LEN, USB_DESC_TYPE_INTERFACE, // Length, Type
@@ -189,17 +189,17 @@ uint8_t configuration_desc[] = {
     // endpoint 1, read CAN
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_RCV | 1, ENDPOINT_TYPE_INT, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040U), // Max Packet (0x0040)
+    TOUSBORDER(0x0040), // Max Packet (0x0040)
     0x05, // Polling Interval (5 frames)
     // endpoint 2, send serial
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_SND | 2, ENDPOINT_TYPE_BULK, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040U), // Max Packet (0x0040)
+    TOUSBORDER(0x0040), // Max Packet (0x0040)
     0x00, // Polling Interval
     // endpoint 3, send CAN
     DSCR_ENDPOINT_LEN, USB_DESC_TYPE_ENDPOINT, // Length, Type
     ENDPOINT_SND | 3, ENDPOINT_TYPE_BULK, // Endpoint Num/Direction, Type
-    TOUSBORDER(0x0040U), // Max Packet (0x0040)
+    TOUSBORDER(0x0040), // Max Packet (0x0040)
     0x00, // Polling Interval
 };
 
@@ -471,10 +471,10 @@ void usb_reset(void) {
   USBx->GRXFSIZ = 0x40;
 
   // 0x100 to offset past GRXFSIZ
-  USBx->DIEPTXF0_HNPTXFSIZ = (0x40U << 16) | 0x40U;
+  USBx->DIEPTXF0_HNPTXFSIZ = (0x40 << 16) | 0x40;
 
   // EP1, massive
-  USBx->DIEPTXF[0] = (0x40U << 16) | 0x80U;
+  USBx->DIEPTXF[0] = (0x40 << 16) | 0x80;
 
   // flush TX fifo
   USBx->GRSTCTL = USB_OTG_GRSTCTL_TXFFLSH | USB_OTG_GRSTCTL_TXFNUM_4;
@@ -487,7 +487,7 @@ void usb_reset(void) {
   USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK;
 
   // ready to receive setup packets
-  USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19)) | (3U << 3);
+  USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) | (3 * 8);
 }
 
 char to_hex_char(int a) {
@@ -506,17 +506,17 @@ void usb_setup(void) {
   switch (setup.b.bRequest) {
     case USB_REQ_SET_CONFIGURATION:
       // enable other endpoints, has to be here?
-      USBx_INEP(1)->DIEPCTL = (0x40U & USB_OTG_DIEPCTL_MPSIZ) | (2U << 18) | (1U << 22) |
+      USBx_INEP(1)->DIEPCTL = (0x40 & USB_OTG_DIEPCTL_MPSIZ) | (2 << 18) | (1 << 22) |
                               USB_OTG_DIEPCTL_SD0PID_SEVNFRM | USB_OTG_DIEPCTL_USBAEP;
       USBx_INEP(1)->DIEPINT = 0xFF;
 
-      USBx_OUTEP(2)->DOEPTSIZ = (1U << 19) | 0x40U;
-      USBx_OUTEP(2)->DOEPCTL = (0x40U & USB_OTG_DOEPCTL_MPSIZ) | (2U << 18) |
+      USBx_OUTEP(2)->DOEPTSIZ = (1 << 19) | 0x40;
+      USBx_OUTEP(2)->DOEPCTL = (0x40 & USB_OTG_DOEPCTL_MPSIZ) | (2 << 18) |
                                USB_OTG_DOEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_USBAEP;
       USBx_OUTEP(2)->DOEPINT = 0xFF;
 
-      USBx_OUTEP(3)->DOEPTSIZ = (1U << 19) | 0x40U;
-      USBx_OUTEP(3)->DOEPCTL = (0x40U & USB_OTG_DOEPCTL_MPSIZ) | (2U << 18) |
+      USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40;
+      USBx_OUTEP(3)->DOEPCTL = (0x40 & USB_OTG_DOEPCTL_MPSIZ) | (2 << 18) |
                                USB_OTG_DOEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_USBAEP;
       USBx_OUTEP(3)->DOEPINT = 0xFF;
 
@@ -529,7 +529,7 @@ void usb_setup(void) {
       break;
     case USB_REQ_SET_ADDRESS:
       // set now?
-      USBx_DEVICE->DCFG |= ((setup.b.wValue.w & 0x7fU) << 4);
+      USBx_DEVICE->DCFG |= ((setup.b.wValue.w & 0x7f) << 4);
 
       #ifdef DEBUG_USB
         puts(" set address\n");
@@ -683,7 +683,7 @@ void usb_init(void) {
   USBx->GUSBCFG = USB_OTG_GUSBCFG_PHYSEL | USB_OTG_GUSBCFG_FDMOD;
 
   // slowest timings
-  USBx->GUSBCFG |= ((USBD_FS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT);
+  USBx->GUSBCFG |= (uint32_t)((USBD_FS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT);
 
   // power up the PHY
 #ifdef STM32F4
@@ -882,22 +882,22 @@ void usb_irqhandler(void) {
       #ifdef DEBUG_USB
         puts("  OUT2 PACKET XFRC\n");
       #endif
-      USBx_OUTEP(2)->DOEPTSIZ = (1U << 19) | 0x40U;
+      USBx_OUTEP(2)->DOEPTSIZ = (1 << 19) | 0x40;
       USBx_OUTEP(2)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK;
     }
 
     if ((USBx_OUTEP(3)->DOEPINT & USB_OTG_DOEPINT_XFRC) != 0) {
       #ifdef DEBUG_USB
         puts("  OUT3 PACKET XFRC\n");
       #endif
-      USBx_OUTEP(3)->DOEPTSIZ = (1U << 19) | 0x40U;
+      USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40;
       USBx_OUTEP(3)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK;
     } else if ((USBx_OUTEP(3)->DOEPINT & 0x2000) != 0) {
       #ifdef DEBUG_USB
         puts("  OUT3 PACKET WTF\n");
       #endif
       // if NAK was set trigger this, unknown interrupt
-      USBx_OUTEP(3)->DOEPTSIZ = (1U << 19) | 0x40U;
+      USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40;
       USBx_OUTEP(3)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
     } else if ((USBx_OUTEP(3)->DOEPINT) != 0) {
       puts("OUTEP3 error ");
@@ -907,7 +907,7 @@ void usb_irqhandler(void) {
 
     if ((USBx_OUTEP(0)->DOEPINT & USB_OTG_DIEPINT_XFRC) != 0) {
       // ready for next packet
-      USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19)) | (1U < 3);
+      USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) | (1 * 8);
     }
 
     // respond to setup packets