SpiSlv: use CE0 to drive nSS, weak pullup does 500k b/s

SpiSlv/main.c

@@ -88,7 +88,7 @@ void setup(void)
     twi_init(TWI_PULLUP);
 
     /* Initialize SPI*/
-    spi_init(DIO16);
+    spi_init();
 
     /* Clear and setup the command buffer, (probably not needed at this point) */
     initCommandBuffer();

SpiSlv/spi-cmd.c

@@ -31,7 +31,6 @@ For a copy of the GNU General Public License use
 #include "spi-cmd.h"
 
 volatile uint8_t spi_data;
-static uint8_t pin_used_in_place_of_missing_chip_select; // pin used to drive nSS pin, that is a fugly hack.
 
 // SPDR is used to shift data in and out, so it will echo back on SPI what was last sent.
 // A copy is made for local use (i.e. SPDR will shift when the master drives SCK)
@@ -42,18 +41,16 @@ ISR(SPI_STC_vect)
     spi_data = SPDR;
 }
 
-// hack: RPUpi CE0 or CE1 should  be used to drive nSS...
-// BUT, it is not wired on the RPUpi board yet so for now it is done with an MCU pin
-void spi_init(uint8_t hack)
+void spi_init(void)
 {
-    pin_used_in_place_of_missing_chip_select = hack;
     // SPI slave setup 
     pinMode(MOSI, INPUT);
+    digitalWrite(MOSI,HIGH);           // weak pull up 
     pinMode(MISO, OUTPUT);
     pinMode(SCK, INPUT);             // SPI slave is cloced by the master
-    pinMode(nSS, INPUT);             // in slave mode nSS is used for synchronization
-    pinMode(pin_used_in_place_of_missing_chip_select, OUTPUT);           // used to drive nSS active when given /spi? ON
-    digitalWrite(pin_used_in_place_of_missing_chip_select,HIGH);         // SPI nSS is active low
+    digitalWrite(SCK,HIGH);           // weak pull up 
+    pinMode(nSS, INPUT);             // in slave mode nSS is used for synchronization (e.g. use CE0 from Raspberry Pi)
+    digitalWrite(nSS,HIGH);           // weak pull up 
 }
 
 void EnableSpi(void)
@@ -75,13 +72,11 @@ void EnableSpi(void)
             // CPHA bit zero sample data on active going SCK edge and setup on the non-active going edge
             SPCR = (1<<SPE)|(1<<SPIE);       // SPI Enable and SPI interrupt enable bit
             SPDR = 0;                        // SPI data register used for shifting data
-            digitalWrite(pin_used_in_place_of_missing_chip_select,LOW);          // SPI nSS is active low
             printf_P(PSTR("{\"SPI\":\"UP\"}\r\n"));
             initCommandBuffer();
         }
         else
         {
-            digitalWrite(pin_used_in_place_of_missing_chip_select,HIGH);         // SPI nSS is active low
             SPCR = 0;                        // SPI Disanable SPI
             SPDR = 0;                        // SPI data register used for shifting data
             printf_P(PSTR("{\"SPI\":\"DOWN\"}\r\n"));

SpiSlv/spi-cmd.h

@@ -2,7 +2,7 @@
 #define SpiCmd_H
 
 extern void EnableSpi(void);
-extern void spi_init(uint8_t);
+extern void spi_init(void);
 
 extern volatile uint8_t spi_data;