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Complete workflow examples #19

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dvdrndlph opened this issue Aug 29, 2019 · 0 comments
Open

Complete workflow examples #19

dvdrndlph opened this issue Aug 29, 2019 · 0 comments

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@dvdrndlph
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It would really help to have the original Verilog files used to synthesize the provided netlists. This would allow users to experience the end-to-end workflow more easily.
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