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32-bit relocation #2

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fachat opened this issue Apr 10, 2024 · 0 comments
Open

32-bit relocation #2

fachat opened this issue Apr 10, 2024 · 0 comments
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@fachat
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fachat commented Apr 10, 2024

32-bit relocation may become relevant in extended 65xx variant CPUs. This may be far-fetched, but even if not needed now, it should be defined at least as "reserved", so that no further changes will block this.

In the relocation table the type entry currently defines these types:

WORD	$80	2 byte address
HIGH	$40	high byte of an address
LOW	$20	low byte of an address
SEGADR	$c0	3 byte address (65816)
SEG	$a0	segment byte of 3 byte address

To support 32-bit relocation, we assume that we do not need to handle the 3rd and 4th byte separately, and allow only high word relocation, in addition to 32 bit relocation:

LONG	$e0	4 byte address
HWORD	$60 upper 2 bytes of a 4 byte address

In the case of HWORD, the entry is followed by the lower two bytes of the address similar to the low byte of a HIGH relocation.

@fachat fachat added this to the 1.4 milestone Apr 10, 2024
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