The freeDSPx AES/SPDIF IN is a digital input expansion board for the freeDSP family.
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DOCUMENTATION Add link to documentation Mar 4, 2016
GERBER added folders for gerber files Dec 2, 2015
PART LIST folder structure + initial sources V1.1 Dec 2, 2015
SOURCES 2.1 XOver Jan 18, 2016
README.md Update README.md Feb 11, 2016

README.md

freeDSPx AES/SPDIF IN

BOARD STATUS: READY TO BE BUILT

MAIN COORDINATOR: florian

This is a digital input add-on board based on a design found at latent laboratories. It's built around a CS8422 asynchronous sample rate converter, has S/PDIF and AES/EBU input plus two potentiometers, a toggle switch and a LED connected to the ADAU's GPIOs.

Comments

  • The design uses the bit clock signal of the serial output as master clock for the ASRC. Therefore, the output needs to be configured in SigmaStudio as ‚Master Mode‘. The BCLK frequency needs to be selected as ‚internal clock/4‘.

License

This work and all other materials under https://github.com/freeDSP are licensed under a Creative Commons Attribution Share-Alike 4.0 license. This allows for both personal and commercial derivative works, as long as they credit freeDSP and release their designs under the same license.