Merge pull request #439 from ghi-electronics/#30_EnableError_OverlapHeap

#30 enable error overlap heap
ghi-electronics · Sep 21, 2018 · 96fffb2 · 96fffb2
2 parents 786481a + c6a553f
commit 96fffb2
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Showing 28 changed files with 76 additions and 76 deletions.
diff --git a/Devices/BrainPadBP2/Scatterfile.gcc.ldf b/Devices/BrainPadBP2/Scatterfile.gcc.ldf
@@ -41,7 +41,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0x20000200 : ALIGN(0x08)
+    ER_RAM_RW 0x20000200 :
     {
         * (rwdata)
         * (.data*)
@@ -67,7 +67,7 @@ SECTIONS
         * (.ARM.extab*)
     }    
 
-    ER_HEAP_BEGIN 0x20006d00 : ALIGN(0x08)
+    ER_HEAP_BEGIN : ALIGN(0x08)
     {
         * (SectionForHeapBegin)
     }>IRAM

diff --git a/Devices/Cerb/Scatterfile.gcc.ldf b/Devices/Cerb/Scatterfile.gcc.ldf
@@ -42,7 +42,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0x20000400 : ALIGN(0x08)
+    ER_RAM_RW 0x20000400 :
     {
         * (rwdata)
         * (.data*)

diff --git a/Devices/EMX/Scatterfile.gcc.ldf b/Devices/EMX/Scatterfile.gcc.ldf
@@ -41,12 +41,12 @@ SECTIONS
         *(VectorsTrampolines)
     }>IRAM
 
-    ER_RAM_RO 0xA0030000 : ALIGN(0x8)
+    ER_RAM_RO 0xA0030000 :
     {
         * (SectionForCodeReadOnlyRAM)
     }>SDRAM
 
-    ER_RAM_RW 0xA0040000 : ALIGN(0x8)
+    ER_RAM_RW 0xA0040000 :
     {
         * (rwdata)
         * (.data*)
@@ -78,7 +78,7 @@ SECTIONS
         * (SectionForHeapEnd)
     }>SDRAM
 
-    ER_RLP_BEGIN 0xA0F00000 : ALIGN(0x8)
+    ER_RLP_BEGIN 0xA0F00000 :
     {
         * (SectionForRlpBegin)
     }>SDRAM
@@ -88,12 +88,12 @@ SECTIONS
         * (SectionForRlpEnd)
     }>SDRAM
 
-    ER_STACK_BOTTOM 0x40001000 : ALIGN(0x8)
+    ER_STACK_BOTTOM 0x40001000 :
     {
         * (SectionForStackBottom)
     }>IRAM
 
-    ER_STACK_TOP 0x40010000 - 0x8: ALIGN(0x8)
+    ER_STACK_TOP 0x40010000 - 0x8:
     {
         * (SectionForStackTop +LAST)
     }>IRAM

diff --git a/Devices/Electron11/Scatterfile.gcc.ldf b/Devices/Electron11/Scatterfile.gcc.ldf
@@ -41,7 +41,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0x20000200 : ALIGN(0x08)
+    ER_RAM_RW 0x20000200 :
     {
         * (rwdata)
         * (.data*)
@@ -67,7 +67,7 @@ SECTIONS
         * (.ARM.extab*)
     }    
 
-    ER_HEAP_BEGIN 0x20006d00 : ALIGN(0x08)
+    ER_HEAP_BEGIN 0x20006d00:
     {
         * (SectionForHeapBegin)
     }>IRAM

diff --git a/Devices/EmbeddedMaster/Scatterfile.gcc.ldf b/Devices/EmbeddedMaster/Scatterfile.gcc.ldf
@@ -41,12 +41,12 @@ SECTIONS
         *(VectorsTrampolines)
     }>IRAM
 
-    ER_RAM_RO 0xA0030000 : ALIGN(0x8)
+    ER_RAM_RO 0xA0030000 :
     {
         * (SectionForCodeReadOnlyRAM)
     }>SDRAM
 
-    ER_RAM_RW 0xA0040000 : ALIGN(0x8)
+    ER_RAM_RW 0xA0040000 :
     {
         * (rwdata)
         * (.data*)
@@ -78,7 +78,7 @@ SECTIONS
         * (SectionForHeapEnd)
     }>SDRAM
 
-    ER_RLP_BEGIN 0xA0700000 : ALIGN(0x8)
+    ER_RLP_BEGIN 0xA0700000 :
     {
         * (SectionForRlpBegin)
     }>IRAM
@@ -88,12 +88,12 @@ SECTIONS
         * (SectionForRlpEnd)
     }>IRAM
 
-    ER_STACK_BOTTOM 0x40001000 : ALIGN(0x8)
+    ER_STACK_BOTTOM 0x40001000 :
     {
         * (SectionForStackBottom)
     }>IRAM
 
-    ER_STACK_TOP 0x40010000 - 0x8: ALIGN(0x8)
+    ER_STACK_TOP 0x40010000 - 0x8:
     {
         * (SectionForStackTop +LAST)
     }>IRAM

diff --git a/Devices/FEZCLR/Scatterfile.gcc.ldf b/Devices/FEZCLR/Scatterfile.gcc.ldf
@@ -41,7 +41,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0x20000200 : ALIGN(0x08)
+    ER_RAM_RW 0x20000200 :
     {
         * (rwdata)
         * (.data*)
@@ -67,7 +67,7 @@ SECTIONS
         * (.ARM.extab*)
     }    
 
-    ER_HEAP_BEGIN 0x20006d00 : ALIGN(0x08)
+    ER_HEAP_BEGIN : ALIGN(0x08)
     {
         * (SectionForHeapBegin)
     }>IRAM

diff --git a/Devices/FEZHydra/Scatterfile.gcc.ldf b/Devices/FEZHydra/Scatterfile.gcc.ldf
@@ -37,14 +37,14 @@ SECTIONS
         LONG(0xE12FFF1E); 
     }>LR_FLASH
 
-    ER_RAM_RO 0x20100000 : ALIGN(0x8)
+    ER_RAM_RO 0x20100000 :
     {        
         *(VectorsTrampolines)
         *(SectionForCodeReadOnlyRAM)       
         *(SectionForBootstrapInRam)
     }>ERAM AT>LR_FLASH
 
-    ER_RAM_RW 0x20101000: ALIGN(0x8)
+    ER_RAM_RW 0x20101000:
     {
         * (rwdata)
         * (.data*)
@@ -65,17 +65,17 @@ SECTIONS
         * (.ARM.extab*)
     }    
 
-    ER_HEAP_BEGIN 0x20300000 : ALIGN(0x8)
+    ER_HEAP_BEGIN 0x20300000 :
     {
         * (SectionForHeapBegin)
     }
 
-    ER_HEAP_END 0x20700000 - 0x8 : ALIGN(0x8)
+    ER_HEAP_END 0x20700000 - 0x8 :
     {
         * (SectionForHeapEnd)
     }
 
-    ER_RLP_BEGIN 0x20700000 : ALIGN(0x8)
+    ER_RLP_BEGIN 0x20700000 :
     {
         * (SectionForRlpBegin)
     }>IRAM
@@ -85,12 +85,12 @@ SECTIONS
         * (SectionForRlpEnd)
     }>IRAM
 
-    ER_STACK_BOTTOM 0x300030 : ALIGN(0x8)
+    ER_STACK_BOTTOM 0x300030 :
     {
         * (SectionForStackBottom)
     }
 
-    ER_STACK_TOP 0x307FF0 : ALIGN(0x8)
+    ER_STACK_TOP 0x307FF0 :
     {
         * (SectionForStackTop +LAST)
     }

diff --git a/Devices/G120/Scatterfile.gcc.ldf b/Devices/G120/Scatterfile.gcc.ldf
@@ -42,7 +42,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0xA0020000 : ALIGN(0x8)
+    ER_RAM_RW 0xA0020000 :
     {
         * (rwdata)
         * (.data*)
@@ -57,7 +57,7 @@ SECTIONS
         * (COMMON)
     }>ERAM
 
-    ER_RAM_RO 0x20000000 : ALIGN(0x8)
+    ER_RAM_RO 0x20000000 :
     {
         * (SectionForCodeReadOnlyRAM)
     }>SRAM AT>LR_FLASH
@@ -77,7 +77,7 @@ SECTIONS
         * (SectionForHeapEnd)
     }>ERAM
 
-    ER_RLP_BEGIN 0xA0F00000 : ALIGN(0x8)
+    ER_RLP_BEGIN 0xA0F00000 :
     {
         * (SectionForRlpBegin)
     }>IRAM

diff --git a/Devices/G30/Scatterfile.gcc.ldf b/Devices/G30/Scatterfile.gcc.ldf
@@ -41,7 +41,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0x20000200 : ALIGN(0x08)
+    ER_RAM_RW 0x20000200 :
     {
         * (rwdata)
         * (.data*)
@@ -67,7 +67,7 @@ SECTIONS
         * (.ARM.extab*)
     }    
 
-    ER_HEAP_BEGIN 0x20007170 : ALIGN(0x08)
+    ER_HEAP_BEGIN : ALIGN(0x08)
     {
         * (SectionForHeapBegin)
     }>IRAM

diff --git a/Devices/G400/Scatterfile.gcc.ldf b/Devices/G400/Scatterfile.gcc.ldf
@@ -37,14 +37,14 @@ SECTIONS
         LONG(0xE12FFF1E); 
     }>LR_FLASH
 
-    ER_RAM_RO 0x20500000 : ALIGN(0x8)
+    ER_RAM_RO 0x20500000 :
     {        
         *(VectorsTrampolines)
         *(SectionForCodeReadOnlyRAM)       
         *(SectionForBootstrapInRam)
     }>ERAM AT>LR_FLASH
 
-    ER_RAM_RW 0x20600000: ALIGN(0x8)
+    ER_RAM_RW 0x20600000:
     {
         * (rwdata)
         * (.data*)
@@ -65,17 +65,17 @@ SECTIONS
         * (.ARM.extab*)
     }    
 
-    ER_HEAP_BEGIN 0x22700000 : ALIGN(0x8)
+    ER_HEAP_BEGIN 0x22700000 :
     {
         * (SectionForHeapBegin)
     }
 
-    ER_HEAP_END 0x26700000 - 0x8 : ALIGN(0x8)
+    ER_HEAP_END 0x26700000 - 0x8 :
     {
         * (SectionForHeapEnd)
     }
 
-    ER_RLP_BEGIN 0x26700000 : ALIGN(0x8)
+    ER_RLP_BEGIN 0x26700000 :
     {
         * (SectionForRlpBegin)
     }>IRAM
@@ -85,12 +85,12 @@ SECTIONS
         * (SectionForRlpEnd)
     }>IRAM
 
-    ER_STACK_BOTTOM 0x300030 : ALIGN(0x8)
+    ER_STACK_BOTTOM 0x300030 :
     {
         * (SectionForStackBottom)
     }
 
-    ER_STACK_TOP 0x307FF0 : ALIGN(0x8)
+    ER_STACK_TOP 0x307FF0 :
     {
         * (SectionForStackTop +LAST)
     }

diff --git a/Devices/G80/Scatterfile.gcc.ldf b/Devices/G80/Scatterfile.gcc.ldf
@@ -42,7 +42,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0x20000400 : ALIGN(0x08)
+    ER_RAM_RW 0x20000400 :
     {
         * (rwdata)
         * (.data*)
@@ -68,7 +68,7 @@ SECTIONS
         * (.ARM.extab*)
     }
 
-    ER_HEAP_BEGIN 0x20009000 :
+    ER_HEAP_BEGIN : ALIGN(0x08)
     {
         * (SectionForHeapBegin)
     }>IRAM

diff --git a/Devices/NUCLEO-F401RE/Scatterfile.gcc.ldf b/Devices/NUCLEO-F401RE/Scatterfile.gcc.ldf
@@ -41,7 +41,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0x20000200 : ALIGN(0x08)
+    ER_RAM_RW 0x20000200 :
     {
         * (rwdata)
         * (.data*)
@@ -67,7 +67,7 @@ SECTIONS
         * (.ARM.extab*)
     }    
 
-    ER_HEAP_BEGIN 0x20006d00 : ALIGN(0x08)
+    ER_HEAP_BEGIN 0x20006d00:
     {
         * (SectionForHeapBegin)
     }>IRAM

diff --git a/Devices/NUCLEO-F411RE/Scatterfile.gcc.ldf b/Devices/NUCLEO-F411RE/Scatterfile.gcc.ldf
@@ -41,7 +41,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0x20000200 : ALIGN(0x08)
+    ER_RAM_RW 0x20000200 :
     {
         * (rwdata)
         * (.data*)
@@ -67,7 +67,7 @@ SECTIONS
         * (.ARM.extab*)
     }    
 
-    ER_HEAP_BEGIN 0x20006d00 : ALIGN(0x08)
+    ER_HEAP_BEGIN 0x20006d00:
     {
         * (SectionForHeapBegin)
     }>IRAM

diff --git a/Devices/Quail/Scatterfile.gcc.ldf b/Devices/Quail/Scatterfile.gcc.ldf
@@ -42,7 +42,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0x20000400 : ALIGN(0x08)
+    ER_RAM_RW 0x20000400 :
     {
         * (rwdata)
         * (.data*)
@@ -68,7 +68,7 @@ SECTIONS
         * (.ARM.extab*)
     }
 
-    ER_HEAP_BEGIN 0x20009000 :
+    ER_HEAP_BEGIN 0x20009000:
     {
         * (SectionForHeapBegin)
     }>IRAM

diff --git a/Devices/UC2550/Scatterfile.gcc.ldf b/Devices/UC2550/Scatterfile.gcc.ldf
@@ -41,7 +41,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0x20000400 : ALIGN(0x08)
+    ER_RAM_RW 0x20000400 :
     {
         * (rwdata)
         * (.data*)
@@ -67,7 +67,7 @@ SECTIONS
         * (.ARM.extab*)
     }
 
-    ER_HEAP_BEGIN 0x20009000 :
+    ER_HEAP_BEGIN : ALIGN(0x08)
     {
         * (SectionForHeapBegin)
     }>IRAM

diff --git a/Devices/UC5550/Scatterfile.gcc.ldf b/Devices/UC5550/Scatterfile.gcc.ldf
@@ -42,7 +42,7 @@ SECTIONS
         * (VectorTable)
     }>IRAM
 
-    ER_RAM_RW 0x20010000 : ALIGN(0x08)
+    ER_RAM_RW 0x20010000 :
     {
         * (rwdata)
         * (.data*)