The purpose of this lab is to design a 4-bit counter using JK flip flops
Files available are:
- Pdf report that conatins all of the below along with detailed procedure
- PlanAhead Generated Physical constraints
- Test bench code to test a few sample example
- Main binary file(.bit) that is then flashed onto board for Demo
- Pictures of the main schematic and waveforms
Note that all labs are required to have an example test bench and waveforms to display theoretical sucess along with a demo to demonstrate actaul success