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SynthBuilder should check modules are already built #246

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mkorbel1 opened this issue Jan 9, 2023 · 2 comments · Fixed by #340
Closed

SynthBuilder should check modules are already built #246

mkorbel1 opened this issue Jan 9, 2023 · 2 comments · Fixed by #340
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@mkorbel1
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mkorbel1 commented Jan 9, 2023

Describe the bug

It's possible to generate outputs using a Synthesizer and SynthBuilder rather than through Module.generateSynth. However, the SynthBuilder does not check that Module.build is called, only generateSynth does. This can produce unexpected outputs (e.g. SystemVerilog with no submodules) without any helpful error message indicating why.

To Reproduce

Use SynthBuilder to generate output verilog without calling build on the Module.

Expected behavior

ModuleNotBuiltException is thrown

Actual behavior

Silent incorrect results

Additional: Dart SDK info

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Additional: pubspec.yaml

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Additional: Context

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@mkorbel1 mkorbel1 added the bug Something isn't working label Jan 9, 2023
@quekyj
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quekyj commented Mar 27, 2023

@mkorbel1 Let me look into this.

@mkorbel1
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Sure, thanks!

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