-
Notifications
You must be signed in to change notification settings - Fork 20
/
extended_registers.go
177 lines (161 loc) · 4.7 KB
/
extended_registers.go
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
// This file is part of Gopher2600.
//
// Gopher2600 is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// Gopher2600 is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with Gopher2600. If not, see <https://www.gnu.org/licenses/>.
package arm
import (
"fmt"
"math"
"github.com/jetsetilly/gopher2600/coprocessor"
"github.com/jetsetilly/gopher2600/hardware/memory/cartridge/arm/architecture"
)
// this file implements the coprocessor.CartCoProc interface where it relates to
// coprocessor registers
//
// extended registers are how the DWARF specification describes the system for
// identifying registers in the coprocessor. details of the extended registers
// can be found at:
//
// https://github.com/ARM-software/abi-aa/releases/download/2023Q1/aadwarf32.pdf
var arm7tdmiRegisterSpec = coprocessor.ExtendedRegisterSpec{
{
Name: coprocessor.ExtendedRegisterCoreGroup,
Start: 0,
End: 15,
Label: func(r int) string {
return fmt.Sprintf("R%02d", r)
},
},
}
var armv7mRegisterSpec = coprocessor.ExtendedRegisterSpec{
{
Name: coprocessor.ExtendedRegisterCoreGroup,
Start: 0,
End: 15,
Label: func(r int) string {
return fmt.Sprintf("R%02d", r)
},
},
{
Name: "FPU",
Start: 64,
End: 95,
Label: func(r int) string {
return fmt.Sprintf("S%02d", r-64)
},
Formatted: true,
},
{
Name: "TIM2",
Start: 10000,
End: 10001,
Label: func(r int) string {
switch r {
case 10000:
return "CR1"
case 10001:
return "CNT"
}
return "unknown TIM2 register"
},
},
}
// RegisterSpec implements the coprocessor.CartCoProc interface
func (arm *ARM) RegisterSpec() coprocessor.ExtendedRegisterSpec {
switch arm.mmap.ARMArchitecture {
case architecture.ARM7TDMI:
return arm7tdmiRegisterSpec
case architecture.ARMv7_M:
return armv7mRegisterSpec
}
panic("register spec: unrecognised arm architecture")
}
func (arm *ARM) register(register int, formatted bool) (uint32, string, bool) {
for _, spec := range arm.RegisterSpec() {
if register >= spec.Start && register <= spec.End {
switch spec.Name {
case coprocessor.ExtendedRegisterCoreGroup:
var s string
if formatted {
s = fmt.Sprintf("%08x", arm.state.registers[register])
}
return arm.state.registers[register], s, true
case "FPU":
var s string
if formatted {
s = fmt.Sprintf("%f", math.Float32frombits(arm.state.fpu.Registers[register-spec.Start]))
}
return arm.state.fpu.Registers[register-spec.Start], s, true
case "TIM2":
var v uint32
switch register {
case 10000:
v, _ = arm.state.timer2.Read(arm.mmap.TIM2CR1)
case 10001:
v, _ = arm.state.timer2.Read(arm.mmap.TIM2CNT)
default:
return 0, "", false
}
var s string
if formatted {
s = fmt.Sprintf("%08x", v)
}
return v, s, true
}
}
}
return 0, "", false
}
// CoreRegisters returns all 16 core registers as an array
func (arm *ARM) CoreRegisters() [NumCoreRegisters]uint32 {
return arm.state.registers
}
// Register implements the coprocess.CartCoProc interface. Returns the value in
// the register. Returns false if the requested register is not recognised
func (arm *ARM) Register(register int) (uint32, bool) {
v, _, ok := arm.register(register, false)
return v, ok
}
// RegisterFormatted implements the coprocess.CartCoProc interface. Returns the value in
// the register. Returns false if the requested register is not recognised
func (arm *ARM) RegisterFormatted(register int) (uint32, string, bool) {
return arm.register(register, true)
}
// RegisterSet implements the coprocess.CartCoProc interface. Sets the register
// to the specified value. Returns false if the requested register is not
// recognised
func (arm *ARM) RegisterSet(register int, value uint32) bool {
for _, spec := range arm.RegisterSpec() {
if register >= spec.Start && register <= spec.End {
switch spec.Name {
case coprocessor.ExtendedRegisterCoreGroup:
arm.state.registers[register] = value
return true
case "FPU":
arm.state.fpu.Registers[register-spec.Start] = value
return true
case "TIM2":
switch register {
case 10000:
arm.state.timer2.Write(arm.mmap.TIM2CR1, value)
case 10001:
arm.state.timer2.Write(arm.mmap.TIM2CNT, value)
default:
return false
}
return true
}
}
}
return false
}