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Add vclk output pin #3

Merged
merged 1 commit into from
Mar 16, 2020
Merged

Add vclk output pin #3

merged 1 commit into from
Mar 16, 2020

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gyurco
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@gyurco gyurco commented Mar 16, 2020

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@gyurco
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gyurco commented Mar 16, 2020

Partially solves:
#1

Vclk input (when sel=3) is not implemented, mainly because the interpolator needs to know the half length of the cycle, and it's not really available when the clock input is external (but maybe using both edge of the input vclk could work).

@jotego jotego merged commit 49d504a into jotego:master Mar 16, 2020
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2 participants