Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Recent changes to ARMv8 persistence (Point of Persistence vs. Point of Deep Persistence) #62

Closed
jeehoonkang opened this issue Jul 12, 2020 · 2 comments
Labels
documentation Improvements or additions to documentation

Comments

@jeehoonkang
Copy link
Member

Latest ARM architecture reference manual: https://developer.arm.com/documentation/ddi0487/fb/ Searching for "persist" leads us to interesting references...

--

78 page says:

ARMv8.2-DCCVADP allows two levels of cache clean to the Point of Persistence by:
• Redefining Point of Persistence, which changes the scope of DC CVAP .
• Defining a Point of Deep Persistence.
• Adding the DC CVADP System instruction.

--

144 page says:

Instructions and data can be held in separate caches or in a unified cache. A cache hierarchy can have one or more
levels of separate instruction and data caches, with one or more unified caches that are located at the levels closest
to the main memory. Memory coherency for cache topologies can be defined using the conceptual points Point of
Unification (PoU), Point of Coherency (PoC), Point of Persistence (PoP), and Point of Deep Persistence (PoDP).

--

2508 page defines PoC, PoU, PoP, PoDP, etc (must-read).

Point of Persistence (PoP)

When ARMv8.2-DCPoP is implemented:
The point in a memory system, if it exists, at or beyond the Point of Coherency, where
a write to memory is maintained when system power is removed, and reliably
recovered when power is restored to the affected locations in memory.

When ARMv8.2-DCPoP and ARMv8.2-DCCVADP are implemented:
The point in a memory system where there is a system guarantee that there is
sufficient energy within the system to ensure that a write to memory will be persistent
if system power is removed.

Point of Deep Persistence (PoDP)

The point in a memory system where any writes that have reached that point are persistent, even
in the event of an instantaneous hardware failure of the power system.

What's the diff? I really cannot understand the diff precisely...

@jeehoonkang jeehoonkang added the documentation Improvements or additions to documentation label Jul 12, 2020
@jeehoonkang
Copy link
Member Author

jeehoonkang commented Jul 12, 2020

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/updates-to-amba-axi-and-chi-specifications says "Deep Persistent CMOs extend the support to cover both shallow PoP, typically where battery backup is used to ensure persistence, and deep PoP, where persistence is guaranteed even in the event of battery backup failure."

So we can say (1) PoP itself guarantees persistence, while (2) DPoP guarantees it even if battery backup fails. In the paper, we can stick to PoP and discuss DPoP only once that if you're not happy with your battery, replace DC CVAP with DC CVADP.

@jeehoonkang jeehoonkang changed the title Recent changes to ARMv8 persistence Recent changes to ARMv8 persistence (Point of Persistence vs. Point of Deep Persistence) Jul 12, 2020
@jeehoonkang
Copy link
Member Author

Azalea가 PoP, PoDP는 하드웨어에 관한 가정의 차이임을 확인했습니다. 일단 이슈는 닫고 나중에 논문쓸때 참고하겠습니다.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
documentation Improvements or additions to documentation
Projects
None yet
Development

No branches or pull requests

1 participant