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Improve run context functions #17

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merged 4 commits into from
May 10, 2022
Merged

Improve run context functions #17

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1812ad8
Remove useless code from compute_op0_address
fmoletta May 5, 2022
b01191b
Improved function compute_op1_addr
fmoletta May 5, 2022
6641c0f
Remove useless code from compute_dst_addr
fmoletta May 5, 2022
0bee15a
Fix import path on run_context.rs
fmoletta May 5, 2022
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74 changes: 25 additions & 49 deletions src/vm/run_context.rs
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
use crate::compiler::instruction::Instruction;
use crate::compiler::instruction::Op1Addr;
use crate::compiler::instruction::Register;
use crate::vm::memory_dict::Memory;
use crate::vm::instruction::Instruction;
use crate::vm::instruction::Op1Addr;
use crate::vm::instruction::Register;
use crate::vm::memory::Memory;
use crate::vm::relocatable::MaybeRelocatable;
use crate::vm::vm_core::VirtualMachineError;
use num_bigint::BigInt;
Expand Down Expand Up @@ -35,63 +35,39 @@ impl RunContext {
};
}

pub fn compute_dst_addr(
&self,
instruction: &Instruction,
) -> Result<MaybeRelocatable, VirtualMachineError> {
pub fn compute_dst_addr(&self, instruction: &Instruction) -> MaybeRelocatable {
let base_addr = match instruction.dst_register {
Register::AP => Some(&self.ap),
Register::FP => Some(&self.fp),
};
match base_addr {
Some(addr) => {
return Ok(addr.add_num_addr(instruction.off0.clone(), Some(self.prime.clone())))
}
_ => return Err(VirtualMachineError::InvalidDstRegError),
Register::AP => &self.ap,
Register::FP => &self.fp,
};
return base_addr.add_num_addr(instruction.off0.clone(), Some(self.prime.clone()));
}

pub fn compute_op0_addr(
&self,
instruction: &Instruction,
) -> Result<MaybeRelocatable, VirtualMachineError> {
pub fn compute_op0_addr(&self, instruction: &Instruction) -> MaybeRelocatable {
let base_addr = match instruction.op0_register {
Register::AP => Some(&self.ap),
Register::FP => Some(&self.fp),
Register::AP => &self.ap,
Register::FP => &self.fp,
};
if let Some(addr) = base_addr {
return Ok(addr.add_num_addr(instruction.off1.clone(), Some(self.prime.clone())));
} else {
return Err(VirtualMachineError::InvalidOp0RegError);
}
return base_addr.add_num_addr(instruction.off1.clone(), Some(self.prime.clone()));
}

pub fn compute_op1_addr(
&self,
instruction: &Instruction,
op0: Option<MaybeRelocatable>,
) -> Result<MaybeRelocatable, VirtualMachineError> {
let base_addr: Option<&MaybeRelocatable>;
match instruction.op1_addr {
Op1Addr::FP => base_addr = Some(&self.fp),
Op1Addr::AP => base_addr = Some(&self.ap),
Op1Addr::IMM => {
if instruction.off2 == BigInt::from_i32(1).unwrap() {
base_addr = Some(&self.pc);
}
return Err(VirtualMachineError::ImmShouldBe1Error);
}
Op1Addr::OP0 => {
match op0 {
Some(addr) => return Ok((addr + instruction.off1.clone()) % self.prime.clone()),
None => return Err(VirtualMachineError::UnknownOp0Error),
};
}
}
if let Some(addr) = base_addr {
return Ok(addr.add_num_addr(instruction.off1.clone(), Some(self.prime.clone())));
} else {
return Err(VirtualMachineError::InvalidOp1RegError);
}
let base_addr = match instruction.op1_addr {
Op1Addr::FP => &self.fp,
Op1Addr::AP => &self.ap,
Op1Addr::IMM => match instruction.off2 == BigInt::from_i32(1).unwrap() {
true => &self.pc,
false => return Err(VirtualMachineError::ImmShouldBe1Error),
},
Op1Addr::OP0 => match op0 {
Some(addr) => return Ok(addr + instruction.off1.clone() % self.prime.clone()),
None => return Err(VirtualMachineError::UnknownOp0Error),
},
};
return Ok(base_addr.add_num_addr(instruction.off1.clone(), Some(self.prime.clone())));
}
}