[stm32] safe gpio toggle #337
Conversation
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Bug: if the pin will be toggled in the interrupt routine, in between reading ODR and setting BSRR, the toggle will be missed. But I agree that this code will not change other bits. In current situation, when ISR occurs inside read-modify-write operation of the XOR, and other bit of the same port is changed in the isr, the value will be overwritten by result of xor with old value of register, undoing the change that was made in the isr. The probability of miss of toggle of specified pin is higher than probability of reset another bit, due to more operations in between read-write operations. But for me, miss of toggle is better than miss of change to the port made in another part of code, because of locality of the bug so 👍 for me. This commit should go soon after it will be tested on blinky example. |
Conflicts: lib/stm32/f3/gpio.c
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👍 for squished first two commits, 👎 for the merge with LM4F modifications |
So should I open a new PR and close this one? |
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No, bufran, it's just the merge process looking funky. It's only a single clean commit after rebasing. Merged via rebase in: 50dd1c5 |
to get updates from libopencm3 and remove our own workarounds for: - STM32F4 25Mhz clock: libopencm3/libopencm3#311 - STM32 defines for TIM9-TIM17: libopencm3/libopencm3#350 - STM32 set I2C address: libopencm3/libopencm3#344 additionally get fixes: - STM32 safe gpio toggle: libopencm3/libopencm3#337
With this change,
gpio_toggle()wont't affect in any case the state of the non-toggled GPIOs.This makes toggling GPIOs more safe, if pins of the same port are used in interrupts.