Add notifier for PLL0 clock and set it 1.5GHz on #848
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Add notifier function for PLL clock. In the function, the cpu_root clock should be operated by saving its current parent and setting a new safe parent (osc clock) before setting the PLL clock rate. After setting PLL rate, it should be switched back to the original parent clock. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
…ing PLL0 rate to 1.5GHz CPUfreq supports 4 cpu frequency loads on 375/500/750/1500MHz. But now PLL0 rate is 1GHz and the cpu frequency loads become 333/500/500/1000MHz in fact. So PLL0 rate should be default set to 1.5GHz and set the cpu_core rate to 500MHz in safe. Fixes: e2c510d ("riscv: dts: starfive: Add cpu scaling for JH7110 SoC") Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
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At least one diff in series https://patchwork.kernel.org/project/linux-riscv/list/?series=843062 irrelevant now. Closing PR. |
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Pull request for series with
subject: Add notifier for PLL0 clock and set it 1.5GHz on
version: 4
url: https://patchwork.kernel.org/project/linux-riscv/list/?series=843062