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AMDGPU: Cleanup some xfailed tests
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Some of these are already fixed or tested somewhere else.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285840 91177308-0d34-0410-b5e6-96231b3b80d8
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arsenm committed Nov 2, 2016
1 parent 864b18d commit 0786e79
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Showing 3 changed files with 10 additions and 52 deletions.
39 changes: 0 additions & 39 deletions test/CodeGen/AMDGPU/simplify-demanded-bits-build-pair.ll

This file was deleted.

20 changes: 9 additions & 11 deletions test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
Original file line number Diff line number Diff line change
@@ -1,7 +1,6 @@
; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs -mattr=-promote-alloca < %s | FileCheck -check-prefix=GCN %s
; XFAIL: *
; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs -mattr=-promote-alloca,-load-store-opt < %s | FileCheck -check-prefix=GCN %s

@sPrivateStorage = external addrspace(3) global [256 x [8 x <4 x i64>]]
@sPrivateStorage = internal addrspace(3) global [256 x [8 x <4 x i64>]] undef

; GCN-LABEL: {{^}}ds_reorder_vector_split:

Expand All @@ -16,20 +15,19 @@
; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:24
; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:16
; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:8
; Appears to be dead store of vector component.
; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]$}}

; GCN: s_waitcnt lgkmcnt

; GCN-DAG ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:8
; GCN-DAG: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:8
; GCN-DAG: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:16
; GCN-DAG: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:24

; Appears to be dead store of vector component.
; GCN: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]$}}
; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:8
; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:16
; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:24

; GCN: buffer_store_dwordx2
; GCN: buffer_store_dwordx2
; GCN: buffer_store_dwordx2
; GCN: buffer_store_dwordx2
; GCN: s_endpgm
define void @ds_reorder_vector_split(<4 x i64> addrspace(1)* nocapture readonly %srcValues, i32 addrspace(1)* nocapture readonly %offsets, <4 x i64> addrspace(1)* nocapture %destBuffer, i32 %alignmentOffset) #0 {
entry:
Expand Down
3 changes: 1 addition & 2 deletions test/CodeGen/AMDGPU/store-global.ll
Original file line number Diff line number Diff line change
Expand Up @@ -282,7 +282,7 @@ entry:

; FUNC-LABEL: {{^}}store_v3i32:
; GCN-DAG: buffer_store_dwordx2
; GCN-DAG: buffer_store_dword
; GCN-DAG: buffer_store_dword v

; EG-DAG: MEM_RAT_CACHELESS STORE_RAW {{T[0-9]+\.[XYZW]}}, {{T[0-9]+\.[XYZW]}},
; EG-DAG: MEM_RAT_CACHELESS STORE_RAW {{T[0-9]+\.XY}}, {{T[0-9]+\.[XYZW]}},
Expand Down Expand Up @@ -400,5 +400,4 @@ entry:
ret void
}


attributes #0 = { nounwind }

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