[Seq] Merge Seq-to-SV lowering passes

include/circt-c/Conversion.h

@@ -0,0 +1,12 @@
+//===-- circt-c/Dialect.h - C API for dialect conversions ---------*- C -*-===//
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef CIRCT_C_CONVERSION_H
+#define CIRCT_C_CONVERSION_H
+
+#include "mlir-c/Support.h"
+
+#include "mlir/Conversion/Passes.capi.h.inc"
+
+#endif // CIRCT_C_CONVERSION_H

include/circt/Conversion/CMakeLists.txt

@@ -1,5 +1,7 @@
 set(LLVM_TARGET_DEFINITIONS Passes.td)
 mlir_tablegen(Passes.h.inc -gen-pass-decls -name Conversion)
+mlir_tablegen(Conversion.capi.h.inc -gen-pass-capi-header --prefix Conversion)
+mlir_tablegen(Conversion.capi.cpp.inc -gen-pass-capi-impl --prefix Conversion)
 add_public_tablegen_target(CIRCTConversionPassIncGen)
 
 add_circt_doc(Passes CIRCTConversionPasses -gen-pass-doc)

include/circt/Conversion/Passes.td

@@ -656,15 +656,17 @@ def LowerArcToLLVM : Pass<"lower-arc-to-llvm", "mlir::ModuleOp"> {
 // ConvertSeqToSV
 //===----------------------------------------------------------------------===//
 
-def LowerSeqFIRRTLToSV: Pass<"lower-seq-firrtl-to-sv",  "mlir::ModuleOp"> {
+def LowerSeqToSV: Pass<"lower-seq-to-sv",  "mlir::ModuleOp"> {
   let summary = "Lower sequential firrtl ops to SV.";
-  let constructor = "circt::createSeqFIRRTLLowerToSVPass()";
-  let dependentDialects = ["circt::sv::SVDialect"];
+  let constructor = "circt::createLowerSeqToSVPass()";
+  let dependentDialects = ["circt::sv::SVDialect", "circt::hw::HWDialect"];
   let options = [
     Option<"disableRegRandomization", "disable-reg-randomization", "bool", "false",
            "Disable emission of register randomization code">,
     Option<"emitSeparateAlwaysBlocks", "emit-separate-always-blocks", "bool", "false",
-           "Emit assigments to registers in separate always blocks">
+           "Emit assigments to registers in separate always blocks">,
+    Option<"lowerToAlwaysFF", "lower-to-always-ff", "bool", "true",
+           "Place assignments to registers into `always_ff` blocks">
   ];
   let statistics = [
     Statistic<"numSubaccessRestored", "num-subaccess-restored",

include/circt/Conversion/SeqToSV.h

@@ -16,17 +16,13 @@
 #include "circt/Support/LLVM.h"
 #include <memory>
 
-namespace mlir {
-class Pass;
-} // namespace mlir
-
 namespace circt {
 
-#define GEN_PASS_DECL_LOWERSEQFIRRTLTOSV
+#define GEN_PASS_DECL_LOWERSEQTOSV
 #include "circt/Conversion/Passes.h.inc"
 
 std::unique_ptr<mlir::Pass>
-createSeqFIRRTLLowerToSVPass(const LowerSeqFIRRTLToSVOptions &options = {});
+createLowerSeqToSVPass(const LowerSeqToSVOptions &options = {});
 std::unique_ptr<mlir::Pass> createLowerFirMemPass();
 std::unique_ptr<mlir::Pass> createLowerSeqFIRRTLInitToSV();
 

include/circt/Dialect/Seq/SeqPasses.h

@@ -19,12 +19,9 @@
 namespace circt {
 namespace seq {
 
-#define GEN_PASS_DECL_LOWERSEQTOSV
 #define GEN_PASS_DECL_EXTERNALIZECLOCKGATE
 #include "circt/Dialect/Seq/SeqPasses.h.inc"
 
-std::unique_ptr<mlir::Pass>
-createSeqLowerToSVPass(std::optional<bool> lowerToAlwaysFF = {});
 std::unique_ptr<mlir::Pass> createLowerSeqHLMemPass();
 std::unique_ptr<mlir::Pass>
 createExternalizeClockGatePass(const ExternalizeClockGateOptions &options = {});

include/circt/Dialect/Seq/SeqPasses.td

@@ -15,16 +15,6 @@
 
 include "mlir/Pass/PassBase.td"
 
-def LowerSeqToSV: Pass<"lower-seq-to-sv", "mlir::ModuleOp"> {
-  let summary = "Lower sequential ops to SV.";
-  let constructor = "circt::seq::createSeqLowerToSVPass()";
-  let dependentDialects = ["circt::sv::SVDialect"];
-  let options = [
-    Option<"lowerToAlwaysFF", "lower-to-always-ff", "bool", "true",
-           "Place assignments to registers into `always_ff` blocks">
-  ];
-}
-
 def LowerSeqFIFO : Pass<"lower-seq-fifo", "hw::HWModuleOp"> {
   let summary = "Lower seq.fifo ops";
   let constructor = "circt::seq::createLowerSeqFIFOPass()";

integration_test/Dialect/Seq/registers.mlir

@@ -1,5 +1,5 @@
 // REQUIRES: verilator
-// RUN: circt-opt %s -lower-seq-firrtl-init-to-sv -lower-seq-firrtl-to-sv -export-verilog -verify-diagnostics -o %t2.mlir > %t1.sv
+// RUN: circt-opt %s -lower-seq-firrtl-init-to-sv -lower-seq-to-sv -export-verilog -verify-diagnostics -o %t2.mlir > %t1.sv
 // RUN: verilator --lint-only +1364-1995ext+v %t1.sv
 // RUN: verilator --lint-only +1364-2001ext+v %t1.sv
 // RUN: verilator --lint-only +1364-2005ext+v %t1.sv

lib/Bindings/Python/CIRCTModule.cpp

@@ -8,6 +8,7 @@
 
 #include "DialectModules.h"
 
+#include "circt-c/Conversion.h"
 #include "circt-c/Dialect/Comb.h"
 #include "circt-c/Dialect/ESI.h"
 #include "circt-c/Dialect/FSM.h"
@@ -37,6 +38,7 @@ static void registerPasses() {
   registerFSMPasses();
   registerHWArithPasses();
   registerHandshakePasses();
+  mlirRegisterConversionPasses();
   mlirRegisterTransformsPasses();
 }
 

lib/Bindings/Python/CMakeLists.txt

@@ -32,6 +32,7 @@ declare_mlir_python_extension(CIRCTBindingsPythonExtension
     CIRCTCAPIExportVerilog
     CIRCTCAPIFSM
     CIRCTCAPIHandshake
+    CIRCTCAPIConversion
     MLIRCAPITransforms
   PRIVATE_LINK_LIBS
     LLVMSupport

lib/CAPI/CMakeLists.txt

@@ -1,3 +1,4 @@
+add_subdirectory(Conversion)
 add_subdirectory(ExportFIRRTL)
 add_subdirectory(ExportVerilog)
 add_subdirectory(Dialect)

lib/CAPI/Conversion/CMakeLists.txt

@@ -0,0 +1,33 @@
+add_mlir_public_c_api_library(CIRCTCAPIConversion
+  Passes.cpp
+
+  LINK_LIBS PUBLIC
+  CIRCTAffineToLoopSchedule
+  CIRCTArcToLLVM
+  CIRCTCalyxToFSM
+  CIRCTCalyxToHW
+  CIRCTCombToArith
+  CIRCTCombToLLVM
+  CIRCTConvertToArcs
+  CIRCTDCToHW
+  CIRCTExportChiselInterface
+  CIRCTExportVerilog
+  CIRCTFIRRTLToHW
+  CIRCTFSMToSV
+  CIRCTHandshakeToDC
+  CIRCTHandshakeToHW
+  CIRCTHWArithToHW
+  CIRCTHWToLLHD
+  CIRCTHWToLLVM
+  CIRCTHWToSV
+  CIRCTHWToSystemC
+  CIRCTLLHDToLLVM
+  CIRCTLoopScheduleToCalyx
+  CIRCTMooreToCore
+  CIRCTPipelineToHW
+  CIRCTSCFToCalyx
+  CIRCTSeqToSV
+  CIRCTStandardToHandshake
+  CIRCTVerifToSV
+)
+

lib/CAPI/Conversion/Passes.cpp

@@ -0,0 +1,26 @@
+//===- Conversion.cpp - C API for Conversion Passes -----------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "circt/Conversion/Passes.h"
+#include "mlir/CAPI/Pass.h"
+#include "mlir/Pass/Pass.h"
+
+// Must include the declarations as they carry important visibility attributes.
+#include "circt/Conversion/Conversion.capi.h.inc"
+
+using namespace circt;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "circt/Conversion/Conversion.capi.cpp.inc"
+
+#ifdef __cplusplus
+}
+#endif