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[TargetInstrInfo] update INLINEASM memoperands once (#74135)
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In commit b053359 ("[X86InstrInfo] support memfold on spillable
inline asm
(#70832)"), I had a last minute fix to update the memoperands. I
originally
did this in the parent foldInlineAsmMemOperand call, updated the mir
test via
update_mir_test_checks.py, but then decided to move it to the child call
of
foldInlineAsmMemOperand.

But I forgot to rerun update_mir_test_checks.py. That last minute change
caused
the same memoperand to be added twice when recursion occurred (for tied
operands). I happened to get lucky that trailing content omitted from
the
CHECK line doesn't result in test failure.

But rerunning update_mir_test_checks.py on the mir test added in that
commit
produces updated output. This is resulting in updates to the test that:
1. conflate additions to the test in child commits with simply updating
the
   test as it should have been when first committed.
2. look wrong because the same memoperand is specified twice (we don't
   deduplicate memoperands when added). Example:

INLINEASM ... :: (load (s32) from %stack.0) (load (s32) from %stack.0)

Fix the bug, so that in child commits, we don't have additional
unrelated test
changes (which would be wrong anyways) from simply running
update_mir_test_checks.py.

Link: #20571
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nickdesaulniers committed Dec 4, 2023
1 parent 47a40e8 commit ec000a6
Showing 1 changed file with 21 additions and 22 deletions.
43 changes: 21 additions & 22 deletions llvm/lib/CodeGen/TargetInstrInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -567,11 +567,8 @@ static MachineInstr *foldPatchpoint(MachineFunction &MF, MachineInstr &MI,

static void foldInlineAsmMemOperand(MachineInstr *MI, unsigned OpNo, int FI,
const TargetInstrInfo &TII) {
MachineOperand &MO = MI->getOperand(OpNo);
const VirtRegInfo &RI = AnalyzeVirtRegInBundle(*MI, MO.getReg());

// If the machine operand is tied, untie it first.
if (MO.isTied()) {
if (MI->getOperand(OpNo).isTied()) {
unsigned TiedTo = MI->findTiedOperandIdx(OpNo);
MI->untieRegOperand(OpNo);
// Intentional recursion!
Expand All @@ -591,24 +588,6 @@ static void foldInlineAsmMemOperand(MachineInstr *MI, unsigned OpNo, int FI,
F.setMemConstraint(InlineAsm::ConstraintCode::m);
MachineOperand &MD = MI->getOperand(OpNo - 1);
MD.setImm(F);

// Update mayload/maystore metadata, and memoperands.
MachineMemOperand::Flags Flags = MachineMemOperand::MONone;
MachineOperand &ExtraMO = MI->getOperand(InlineAsm::MIOp_ExtraInfo);
if (RI.Reads) {
ExtraMO.setImm(ExtraMO.getImm() | InlineAsm::Extra_MayLoad);
Flags |= MachineMemOperand::MOLoad;
}
if (RI.Writes) {
ExtraMO.setImm(ExtraMO.getImm() | InlineAsm::Extra_MayStore);
Flags |= MachineMemOperand::MOStore;
}
MachineFunction *MF = MI->getMF();
const MachineFrameInfo &MFI = MF->getFrameInfo();
MachineMemOperand *MMO = MF->getMachineMemOperand(
MachinePointerInfo::getFixedStack(*MF, FI), Flags, MFI.getObjectSize(FI),
MFI.getObjectAlign(FI));
MI->addMemOperand(*MF, MMO);
}

// Returns nullptr if not possible to fold.
Expand All @@ -629,6 +608,26 @@ static MachineInstr *foldInlineAsmMemOperand(MachineInstr &MI,

foldInlineAsmMemOperand(&NewMI, Op, FI, TII);

// Update mayload/maystore metadata, and memoperands.
const VirtRegInfo &RI =
AnalyzeVirtRegInBundle(MI, MI.getOperand(Op).getReg());
MachineOperand &ExtraMO = NewMI.getOperand(InlineAsm::MIOp_ExtraInfo);
MachineMemOperand::Flags Flags = MachineMemOperand::MONone;
if (RI.Reads) {
ExtraMO.setImm(ExtraMO.getImm() | InlineAsm::Extra_MayLoad);
Flags |= MachineMemOperand::MOLoad;
}
if (RI.Writes) {
ExtraMO.setImm(ExtraMO.getImm() | InlineAsm::Extra_MayStore);
Flags |= MachineMemOperand::MOStore;
}
MachineFunction *MF = NewMI.getMF();
const MachineFrameInfo &MFI = MF->getFrameInfo();
MachineMemOperand *MMO = MF->getMachineMemOperand(
MachinePointerInfo::getFixedStack(*MF, FI), Flags, MFI.getObjectSize(FI),
MFI.getObjectAlign(FI));
NewMI.addMemOperand(*MF, MMO);

return &NewMI;
}

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