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fix susy gg_tt builds and add it to the repo #625

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merged 98 commits into from
Mar 15, 2024
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@valassi valassi commented Apr 3, 2023

This is a followup to #624, where I fixed the code generation of SUSY gg_tt. Here I am also trying to fix the builds, but there are issues, some of which will remain "unfixable" for a while (I will post details: trigonometric functions are not constexpr; and FFV function calls should not include "-COUPS" as these are pointers not values).

Note also, the main reason why I started going into susy processes with PR #624 and this new PR here is that I wanted to check "nprocesses>1" in #272, before PR #619. This PR is currently also including some SM processes to that effect (I will probably split them away).

The default HRDCOD=0 build presently fails

ccache g++  -O3  -std=c++17 -I.  -fPIC -Wall -Wshadow -Wextra -ffast-math  -fopenmp -march=skylake-avx512 -mprefer-vector-width=256  -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -c Parameters_MSSM_SLHA2.cc -o Parameters_MSSM_SLHA2.o
In file included from Parameters_MSSM_SLHA2.cc:8:
Parameters_MSSM_SLHA2.h:19:2: error: #error This non-SM physics process only supports MGONGPU_HARDCODE_PARAM builds (madgraph5#439): please run "make HRDCOD=1"
   19 | #error This non-SM physics process only supports MGONGPU_HARDCODE_PARAM builds (madgraph5#439): please run "make HRDCOD=1"
      |  ^~~~~
In file included from Parameters_MSSM_SLHA2.cc:8:
Parameters_MSSM_SLHA2.h: In function ‘const Parameters_MSSM_SLHA2_dependentCouplings::DependentCouplings_sv Parameters_MSSM_SLHA2_dependentCouplings::computeDependentCouplings_fromG(const fptype_sv&)’:
Parameters_MSSM_SLHA2.h:806:56: error: conversion from ‘fptype_sv’ {aka ‘__vector(4) double’} to non-scalar type ‘const mgOnGpu::cxsmpl<double>’ requested
  806 |       constexpr cxsmpl<double> mdl_G__exp__2 = ( ( G ) * ( G ) );
      |                                                ~~~~~~~~^~~~~~~~~
Parameters_MSSM_SLHA2.h:809:31: error: ‘mdl_I51x11’ was not declared in this scope
  809 |       out.GC_51 = -( cI * G * mdl_I51x11 );
      |                               ^~~~~~~~~~
Parameters_MSSM_SLHA2.cc: In member function ‘void Parameters_MSSM_SLHA2::setIndependentParameters(SLHAReader&)’:
Parameters_MSSM_SLHA2.cc:67:3: error: ‘indices’ was not declared in this scope
   67 |   indices[0] = 3;
      |   ^~~~~~~
make[1]: *** [cudacpp_src.mk:236: Parameters_MSSM_SLHA2.o] Error 1

The non-default HRDCOD=1 however also fails, the first error being

ccache g++  -O3  -std=c++17 -I.  -fPIC -Wall -Wshadow -Wextra -ffast-math  -fopenmp -march=skylake-avx512 -mprefer-vector-width=256  -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -DMGONGPU_HARDCODE_PARAM -c Parameters_MSSM_SLHA2.cc -o Parameters_MSSM_SLHA2.o
In file included from Parameters_MSSM_SLHA2.cc:8:
Parameters_MSSM_SLHA2.h:380:51: error: call to non-‘constexpr’ function ‘mgOnGpu::cxsmpl<FP> mgOnGpu::conj(const mgOnGpu::cxsmpl<FP>&) [with FP = double]’
  380 |   constexpr cxsmpl<double> mdl_conjg__yu3x3 = conj( mdl_yu3x3 );
      |                                               ~~~~^~~~~~~~~~~~~
In file included from Parameters_MSSM_SLHA2.h:13,
                 from Parameters_MSSM_SLHA2.cc:8:
Now valid code? In the past this failed as "a constexpr function cannot have a nonliteral return type mgOnGpu::cxsmpl"
…sa (why is this different here??)

Replace
      constexpr cxsmpl<double> mdl_G__exp__2 = ( ( G ) * ( G ) );
by
      const fptype_sv mdl_G__exp__2 = ( ( G ) * ( G ) );
@valassi valassi marked this pull request as draft April 3, 2023 15:32
…es from printParameters to setParameters

The HRDCOD=1 build now fails with

ccache /usr/local/cuda-12.0/bin/nvcc  -O3  -lineinfo -I. -I../../src -I../../../../../tools -I/usr/local/cuda-12.0/include/ -DUSE_NVTX -gencode arch=compute_70,code=compute_70 -gencode arch=compute_70,code=sm_70 -use_fast_math -std=c++17  -ccbin /usr/lib64/ccache/g++ -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -DMGONGPU_HARDCODE_PARAM -Xcompiler -fPIC -c gcheck_sa.cu -o gcheck_sa.o
../../src/Parameters_MSSM_SLHA2.h(310): error: expression must have a constant value
../../src/Parameters_MSSM_SLHA2.h(310): note #2703-D: cannot call non-constexpr function "atan(double) noexcept(true)"
/usr/local/cuda-12.0/include/crt/math_functions.h(4137): here
../../src/Parameters_MSSM_SLHA2.h(725): error: expression must have a constant value
../../src/Parameters_MSSM_SLHA2.h(725): note #2703-D: cannot call non-constexpr function "cos(double) noexcept(true)"
/usr/local/cuda-12.0/include/crt/math_functions.h(553): here
../../src/Parameters_MSSM_SLHA2.h(726): error: expression must have a constant value
../../src/Parameters_MSSM_SLHA2.h(726): note #2703-D: cannot call non-constexpr function "sin(double) noexcept(true)"
/usr/local/cuda-12.0/include/crt/math_functions.h(520): here
3 errors detected in the compilation of "gcheck_sa.cu".

The CUDA_HOME=none HRDCOD=0 build also fails with
ccache g++  -O3  -std=c++17 -I. -I../../src -I../../../../../tools  -Wall -Wshadow -Wextra -ffast-math  -fopenmp -march=skylake-avx512 -mprefer-vector-width=256  -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -DMGONGPU_HARDCODE_PARAM -DMGONGPU_HAS_NO_CURAND  -fPIC -c CPPProcess.cc -o CPPProcess.o
CPPProcess.cc: In function ‘void mg5amcCpu::calculate_wavefunctions(int, const fptype*, const fptype*, mgOnGpu::fptype*, fptype_sv*, int)’:
CPPProcess.cc:241:81: error: wrong type argument to unary minus
  241 |       FFV1_0<W_ACCESS, A_ACCESS, CD_ACCESS>( w_fp[3], w_fp[2], w_fp[4], -COUPs[1], &amp_fp[0] );
      |                                                                          ~~~~~~~^
CPPProcess.cc:251:62: error: wrong type argument to unary minus
  251 |       FFV1_1<W_ACCESS, CD_ACCESS>( w_fp[2], w_fp[0], -COUPs[1], cIPD[0], cIPD[1], w_fp[4] );
      |                                                       ~~~~~~~^
CPPProcess.cc:254:81: error: wrong type argument to unary minus
  254 |       FFV1_0<W_ACCESS, A_ACCESS, CD_ACCESS>( w_fp[3], w_fp[4], w_fp[1], -COUPs[1], &amp_fp[0] );
      |                                                                          ~~~~~~~^
CPPProcess.cc:263:62: error: wrong type argument to unary minus
  263 |       FFV1_2<W_ACCESS, CD_ACCESS>( w_fp[3], w_fp[0], -COUPs[1], cIPD[0], cIPD[1], w_fp[4] );
      |                                                       ~~~~~~~^
CPPProcess.cc:266:81: error: wrong type argument to unary minus
  266 |       FFV1_0<W_ACCESS, A_ACCESS, CD_ACCESS>( w_fp[4], w_fp[2], w_fp[1], -COUPs[1], &amp_fp[0] );
      |                                                                          ~~~~~~~^
This is
       cmd="import model MSSM_SLHA2; define q = u c d s u~ c~ d~ s~; generate g q > t t~ l- l+ q"

This is one of the first processes I tested (inspired from Nathan's tests).

But in the end many issues are visible in SM gq_ttq and gq_ttllq, and in SUSY gg_tt
I keep this commit for the record, but I will revert it
Revert "[susy2] in CODEGEN, add SUSY process susy_gq_ttllq"
This reverts commit 01f5bbc.
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valassi commented Apr 3, 2023

I have cleaned this up, splitting other stuff like the SM gq_ttq to PR #626

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valassi commented Apr 7, 2023

For the record also keep in mind this comment by Olivier
#272 (comment)
"also it seems that some matrix element are missing (the symmetric ones) in the susy case, this need to be fix."

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valassi commented Feb 13, 2024

I have just merged the latest master into this PR (which contains a new sa generated code dir, so there are no conflicts).

Note that the code was generated with old code, so this cannot be directly trasnposed to codegen

…pply old changes on top

'make HRDCOD=0' fails with
ccache /cvmfs/sft.cern.ch/lcg/releases/gcc/12.1.0-57c96/x86_64-centos9/bin/g++  -O3  -std=c++17 -I.  -fPIC -Wall -Wshadow -Wextra -ffast-math  -fopenmp  -march=skylake-avx512 -mprefer-vector-width=256  -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -fPIC -c Parameters_MSSM_SLHA2.cc -o Parameters_MSSM_SLHA2.o
In file included from Parameters_MSSM_SLHA2.cc:15:
Parameters_MSSM_SLHA2.h:26:2: error: #error This non-SM physics process only supports MGONGPU_HARDCODE_PARAM builds (madgraph5#439): please run "make HRDCOD=1"
   26 | #error This non-SM physics process only supports MGONGPU_HARDCODE_PARAM builds (madgraph5#439): please run "make HRDCOD=1"
      |  ^~~~~

'make HRDCOD=1' fails with
ccache /cvmfs/sft.cern.ch/lcg/releases/gcc/12.1.0-57c96/x86_64-centos9/bin/g++  -O3  -std=c++17 -I.  -fPIC -Wall -Wshadow -Wextra -ffast-math  -fopenmp  -march=skylake-avx512 -mprefer-vector-width=256  -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -DMGONGPU_HARDCODE_PARAM -fPIC -c Parameters_MSSM_SLHA2.cc -o Parameters_MSSM_SLHA2.o
In file included from Parameters_MSSM_SLHA2.cc:15:
Parameters_MSSM_SLHA2.h:403:53: error: call to non-'constexpr' function 'mgOnGpu::cxsmpl<FP> mgOnGpu::conj(const cxsmpl<FP>&) [with FP = double]'
  403 |     constexpr cxsmpl<double> mdl_conjg__yu3x3 = conj( mdl_yu3x3 );
      |                                                 ~~~~^~~~~~~~~~~~~
Previously untracked files, now added with git add:
        susy_gg_tt.sa/.gitignore
        susy_gg_tt.sa/COPYING
        susy_gg_tt.sa/COPYING.LESSER
        susy_gg_tt.sa/COPYRIGHT
        susy_gg_tt.sa/SubProcesses/CommonRandomNumberKernel.cc
        susy_gg_tt.sa/SubProcesses/CommonRandomNumbers.h
        susy_gg_tt.sa/SubProcesses/CurandRandomNumberKernel.cc
        susy_gg_tt.sa/SubProcesses/GpuAbstraction.h
        susy_gg_tt.sa/SubProcesses/GpuRuntime.h
        susy_gg_tt.sa/SubProcesses/HiprandRandomNumberKernel.cc
        susy_gg_tt.sa/SubProcesses/P1_Sigma_MSSM_SLHA2_gg_ttx/.gitignore
        susy_gg_tt.sa/SubProcesses/P1_Sigma_MSSM_SLHA2_gg_ttx/CommonRandomNumberKernel.cc
        susy_gg_tt.sa/SubProcesses/P1_Sigma_MSSM_SLHA2_gg_ttx/CommonRandomNumbers.h
        susy_gg_tt.sa/SubProcesses/P1_Sigma_MSSM_SLHA2_gg_ttx/CurandRandomNumberKernel.cc
        susy_gg_tt.sa/SubProcesses/P1_Sigma_MSSM_SLHA2_gg_ttx/GpuAbstraction.h
        susy_gg_tt.sa/SubProcesses/P1_Sigma_MSSM_SLHA2_gg_ttx/GpuRuntime.h
        susy_gg_tt.sa/SubProcesses/P1_Sigma_MSSM_SLHA2_gg_ttx/HiprandRandomNumberKernel.cc
        susy_gg_tt.sa/mg5.in
        susy_gg_tt.sa/test/
…alid code? In the past this failed as "a constexpr function cannot have a nonliteral return type mgOnGpu::cxsmpl")

Cherry-pick commit 0fd793b from Mon Apr 3 13:55:33 2023 +0200, no conflicts
Change the date with 'git commit --amend --date="$(date -R)"'
The above comments come from the original commit.

Updates on 14-Feb-2024 below.

'make HRDCOD=1' fails with
ccache /cvmfs/sft.cern.ch/lcg/releases/gcc/12.1.0-57c96/x86_64-centos9/bin/g++  -O3  -std=c++17 -I.  -fPIC -Wall -Wshadow -Wextra -ffast-math  -fopenmp  -march=skylake-avx512 -mprefer-vector-width=256  -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -DMGONGPU_HARDCODE_PARAM -fPIC -c Parameters_MSSM_SLHA2.cc -o Parameters_MSSM_SLHA2.o
In file included from Parameters_MSSM_SLHA2.cc:15:
Parameters_MSSM_SLHA2.h:758:5: error: expected unqualified-id before 'if'
  758 |     if( mdl_Mneu2 < 0 )
      |     ^~
… particles in HRDCOD=1

Cherry-pick commit bd5db8f from Mon Apr 3 14:06:20 2023 +0200, fix conflicts with HIP support PR
Change the date with 'git commit --amend --date="$(date -R)"'
The above comments come from the original commit.

Updates on 14-Feb-2024 below.

'make HRDCOD=1' fails with
ccache /cvmfs/sft.cern.ch/lcg/releases/gcc/12.1.0-57c96/x86_64-centos9/bin/g++  -O3  -std=c++17 -I.  -fPIC -Wall -Wshadow -Wextra -ffast-math  -fopenmp  -march=skylake-avx512 -mprefer-vector-width=256  -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -DMGONGPU_HARDCODE_PARAM -fPIC -c Parameters_MSSM_SLHA2.cc -o Parameters_MSSM_SLHA2.o
In file included from Parameters_MSSM_SLHA2.cc:15:
Parameters_MSSM_SLHA2.h: In function 'const mg5amcCpu::Parameters_MSSM_SLHA2_dependentCouplings::DependentCouplings_sv mg5amcCpu::Parameters_MSSM_SLHA2_dependentCouplings::computeDependentCouplings_fromG(const mg5amcCpu::fptype_sv&)':
Parameters_MSSM_SLHA2.h:839:58: error: conversion from 'mg5amcCpu::fptype_sv' {aka '__vector(4) double'} to non-scalar type 'const mgOnGpu::cxsmpl<double>' requested
  839 |         constexpr cxsmpl<double> mdl_G__exp__2 = ( ( G ) * ( G ) );
      |                                                  ~~~~~~~~^~~~~~~~~
Parameters_MSSM_SLHA2.h:839:58: error: could not convert '(((mg5amcCpu::fptype_sv)G) * ((mg5amcCpu::fptype_sv)G))' from 'mg5amcCpu::fptype_sv' {aka '__vector(4) double'} to 'const mgOnGpu::cxsmpl<double>'
  839 |         constexpr cxsmpl<double> mdl_G__exp__2 = ( ( G ) * ( G ) );
      |                                                  ~~~~~~~~^~~~~~~~~
      |                                                          |
      |                                                          mg5amcCpu::fptype_sv {aka __vector(4) double}
…sa (why is this different here??)

Replace
      constexpr cxsmpl<double> mdl_G__exp__2 = ( ( G ) * ( G ) );
by
      const fptype_sv mdl_G__exp__2 = ( ( G ) * ( G ) );

Cherry-pick commit 36dfe05 from Mon Apr 3 14:09:36 2023 +0200, fix a conflict with HIP support PR
Change the date with 'git commit --amend --date="$(date -R)"'
The above comments come from the original commit.

Updates on 14-Feb-2024 below.

'make HRDCOD=1' fails with
ccache /usr/local/cuda-12.0/bin/nvcc   -Xcompiler -O3 -lineinfo -I. -I../../src -I/usr/local/cuda-12.0/include/ -DUSE_NVTX -gencode arch=compute_70,code=compute_70 -gencode arch=compute_70,code=sm_70 -use_fast_math -std=c++17  -ccbin /cvmfs/sft.cern.ch/lcg/releases/gcc/12.1.0-57c96/x86_64-centos9/bin/g++ -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -DMGONGPU_HARDCODE_PARAM -Xcompiler -fPIC -c -x cu Parameters_MSSM_SLHA2.cc -o Parameters_MSSM_SLHA2_cu.o
Parameters_MSSM_SLHA2.h(333): error: expression must have a constant value
Parameters_MSSM_SLHA2.h(333): note #2703-D: cannot call non-constexpr function "atan(double) noexcept(true)"
/usr/local/cuda-12.0/include/crt/math_functions.h(4137): here
Parameters_MSSM_SLHA2.h(748): error: expression must have a constant value
Parameters_MSSM_SLHA2.h(748): note #2703-D: cannot call non-constexpr function "cos(double) noexcept(true)"
/usr/local/cuda-12.0/include/crt/math_functions.h(553): here
Parameters_MSSM_SLHA2.h(749): error: expression must have a constant value
Parameters_MSSM_SLHA2.h(749): note #2703-D: cannot call non-constexpr function "sin(double) noexcept(true)"
/usr/local/cuda-12.0/include/crt/math_functions.h(520): here
3 errors detected in the compilation of "Parameters_MSSM_SLHA2.cc".

Note however that 'CUDA_HOME=none make HRDCOD=1 -j' does succeed!
This means that constexpr sin, cos, atan exist in gcc but not in nvcc?
Maybe they can be simply hardcoded for nvcc as they are for gcc?
Also, check.exe succeeds, while runTest.exe fails because the reference logfile is missing.

Note also: cannot cherry-pick commit 586195d from Mon Apr 3 14:13:36 2023 +0200
This would result in an empty commit: I imagine that the upstream mg5anlo has modified this part of the generated code
CUDA_HOME=none make HRDCOD=1 -j
CUDACPP_RUNTEST_DUMPEVENTS=1 ./runTest.exe
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valassi commented Feb 14, 2024

I have updated this PR to our latest code bases and updated the PR. A few findings

In any case, the real goal here (also to allow @zeniheisser 's reweighting) is to allow HRDCOD=0 builds.

PS A few changes were necessary. These are NOT YET in codegen. I only modified the generated susy_gg_tt here. This remains well in WIP anyway.

…ent out "#error only HRDCOD=1 is supported"

'make HRDCOD=0' fails with
ccache /cvmfs/sft.cern.ch/lcg/releases/gcc/12.1.0-57c96/x86_64-centos9/bin/g++  -O3  -std=c++17 -I.  -fPIC -Wall -Wshadow -Wextra -ffast-math  -fopenmp  -march=skylake-avx512 -mprefer-vector-width=256  -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -fPIC -c Parameters_MSSM_SLHA2.cc -o Parameters_MSSM_SLHA2.o
In file included from Parameters_MSSM_SLHA2.cc:15:
Parameters_MSSM_SLHA2.h: In function 'const mg5amcCpu::Parameters_MSSM_SLHA2_dependentCouplings::DependentCouplings_sv mg5amcCpu::Parameters_MSSM_SLHA2_dependentCouplings::computeDependentCouplings_fromG(const mg5amcCpu::fptype_sv&)':
Parameters_MSSM_SLHA2.h:842:33: error: 'mdl_I51x11' was not declared in this scope
  842 |         out.GC_51 = -( cI * G * mdl_I51x11 );
      |                                 ^~~~~~~~~~
Parameters_MSSM_SLHA2.cc: In member function 'void mg5amcCpu::Parameters_MSSM_SLHA2::setIndependentParameters(SLHAReader&)':
Parameters_MSSM_SLHA2.cc:80:3: error: 'indices' was not declared in this scope
   80 |   indices[0] = 3;
      |   ^~~~~~~
make[1]: *** [cudacpp_src.mk:251: Parameters_MSSM_SLHA2.o] Error 1
…SLHA2::getInstance()->mdl_I51x11 visible in HRDCOD=0 builds

'make HRDCOD=0' now fails with
ccache /cvmfs/sft.cern.ch/lcg/releases/gcc/12.1.0-57c96/x86_64-centos9/bin/g++  -O3  -std=c++17 -I.  -fPIC -Wall -Wshadow -Wextra -ffast-math  -fopenmp  -march=skylake-avx512 -mprefer-vector-width=256  -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -fPIC -c Parameters_MSSM_SLHA2.cc -o Parameters_MSSM_SLHA2.o
Parameters_MSSM_SLHA2.cc: In member function 'void mg5amcCpu::Parameters_MSSM_SLHA2::setIndependentParameters(SLHAReader&)':
Parameters_MSSM_SLHA2.cc:80:3: error: 'indices' was not declared in this scope
   80 |   indices[0] = 3;
      |   ^~~~~~~
…at was previously commented out

'make HRDCOD=0' now succeeds! however it gives a warning for cuda:
ccache /usr/local/cuda-12.0/bin/nvcc   -Xcompiler -O3 -lineinfo -I. -I../../src -I/usr/local/cuda-12.0/include/ -DUSE_NVTX -gencode arch=compute_70,code=compute_70 -gencode arch=compute_70,code=sm_70 -use_fast_math -std=c++17  -ccbin /cvmfs/sft.cern.ch/lcg/releases/gcc/12.1.0-57c96/x86_64-centos9/bin/g++ -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -Xcompiler -fPIC -c -x cu CPPProcess.cc -o CPPProcess_cu.o
../../src/Parameters_MSSM_SLHA2.h(828): warning #20011-D: calling a __host__ function("mg5amcGpu::Parameters_MSSM_SLHA2::getInstance()") from a __host__ __device__ function("mg5amcGpu::Parameters_MSSM_SLHA2_dependentCouplings::computeDependentCouplings_fromG") is not allowed
../../src/Parameters_MSSM_SLHA2.h(828): remark: The warnings can be suppressed with "-diag-suppress <warning-number>"

The warning is probably very relevant because computed MEs are all 0 at runtime!
At runtime, gcheck.exe gives 0 MEs.
At runtime, runTest.exe fails because it gives 0 MEs.

[----------] 1 test from SIGMA_MSSM_SLHA2_GG_TTX_GPU/MadgraphTest
[ RUN      ] SIGMA_MSSM_SLHA2_GG_TTX_GPU/MadgraphTest.CompareMomentaAndME/0
INFO: Opening reference file ../../test/ref/dump_CPUTest.Sigma_MSSM_SLHA2_gg_ttx.txt
MadgraphTest.h:310: Failure
The difference between testDriver->getMatrixElement( ievt ) and referenceData[iiter].MEs[ievt] is 2.0052779755903329, which exceeds toleranceMEs * referenceData[iiter].MEs[ievt], where
testDriver->getMatrixElement( ievt ) evaluates to 0,
referenceData[iiter].MEs[ievt] evaluates to 2.0052779755903329, and
toleranceMEs * referenceData[iiter].MEs[ievt] evaluates to 2.0052779755903328e-06.
Google Test trace:
MadgraphTest.h:289: In comparing event 0 from iteration 0
   0  7.500000000000000e+02  0.000000000000000e+00  0.000000000000000e+00  7.500000000000000e+02
ref0  7.500000000000000e+02  0.000000000000000e+00  0.000000000000000e+00  7.500000000000000e+02

   1  7.500000000000000e+02  0.000000000000000e+00  0.000000000000000e+00 -7.500000000000000e+02
ref1  7.500000000000000e+02  0.000000000000000e+00  0.000000000000000e+00 -7.500000000000000e+02

   2  7.500000000000001e+02  5.849331413473453e+02 -3.138365726669761e+02 -3.490842674916367e+02
ref2  7.500000000000000e+02  5.849331413473452e+02 -3.138365726669761e+02 -3.490842674916366e+02

   3  7.500000000000002e+02 -5.849331413473453e+02  3.138365726669762e+02  3.490842674916365e+02
ref3  7.500000000000001e+02 -5.849331413473452e+02  3.138365726669761e+02  3.490842674916364e+02

  ME  0.000000000000000e+00
r.ME  2.005277975590333e+00

[  FAILED  ] SIGMA_MSSM_SLHA2_GG_TTX_GPU/MadgraphTest.CompareMomentaAndME/0, where GetParam() = 0x2074830 (29 ms)

NB: the problems above only concern CUDA.
For C++-only builds, HRDCOD=0 builds now fully succeed
After `CUDA_HOME=none make HRDCOD=0 -j`, both check.exe and runTest.exe succeed at runtime.
This means that C++ builds are now essentially ok for both HRDCOD=0 and HRDCOD=1.
The code needs some cleanup however and a backport to code generation, with cross-tests for other processes.
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valassi commented Feb 14, 2024

A further update for HRDCOD=0.

  • I have "temporarely" removed the error "you should use HRDCOD=1", see 717a5de: this needs a cleanup, make it a warning? only for cuda?
  • I have fixed the first of two issues, the visibility of mdl_I51x11, see df8b87a. I had to use a getInstance() accessor to a static class. This goes through in c++, but it gives a warning in cuda, which I suspect is the reason why MEs are all 0 in cuda at runtime,
  • I have fixed the second of two issues, by defining an "indices" variable that was commented out, see 4f3b83a. This is ok here, but maybe should remain commented out in other codes where this is not needed (or an unused variable warning must be silenced?). This neeeds some cleanup before the backport to codegen.

Anyway, all in all, this is now the matrix of where we are with this:

  • C++ builds and tests are now fully ok both with HRDCOD=0 and HRDCOD=1. This is very good, so I guess this PR can evolve from WIP and be merged at some point.
  • CUDA builds fail with HRDCOD=1 because of sin/cos/atan not constexpr (SUSY HRDCOD=1 builds fail because sin/cos/atan are not constexpr (only CUDA fails, while C++ succeeds) #627 )
  • CUDA builds succeed with HRDCOD=0, but MEs are all 0 at runtime. I guess that a better structure of parameter classes is needed here, to avoid that getInstance which host/device code does not like? Or this mdl_I51x11 must be also copied from the host to the device? I should cross check again where the alphas running happens in cuda, and if it is on the host then it is just the coupling that must be transferred to the device...

…sons

git checkout 04e31d7 tmad/logs_*
git checkout c27cb7e tput/logs_*
    STARTED  AT Thu Feb 29 11:07:30 PM CET 2024
    ./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean
    ENDED(1) AT Fri Mar  1 02:43:24 AM CET 2024 [Status=0]
    ./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean
    ENDED(2) AT Fri Mar  1 03:09:38 AM CET 2024 [Status=0]
    ./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean
    ENDED(3) AT Fri Mar  1 03:19:22 AM CET 2024 [Status=0]
    ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst
    ENDED(4) AT Fri Mar  1 03:22:39 AM CET 2024 [Status=0]
    ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -curhst
    ENDED(5) AT Fri Mar  1 03:25:53 AM CET 2024 [Status=0]
    ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common
    ENDED(6) AT Fri Mar  1 03:29:12 AM CET 2024 [Status=0]

    No errors found in logs
    STARTED AT Fri Mar  1 03:29:12 AM CET 2024
    ENDED   AT Fri Mar  1 07:51:32 AM CET 2024

    Status=0

    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_d_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_f_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_m_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_d_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_f_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_m_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_d_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_f_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_m_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt
    24 /data/avalassi/GPU2023/madgraph4gpuBis/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt
…and comment it out (this is not supported in tput/throughputX.sh and in cudacpp anyway)
… not mentioned in usage, and is not supported in cudacpp code anyway)
…ttq)

(1) Build tests on login node (~22h)

STARTED  AT Fri 01 Mar 2024 12:11:58 AM EET
./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean  -makeonly
ENDED(1) AT Fri 01 Mar 2024 09:30:18 PM EET [Status=0]
./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean  -makeonly
ENDED(2) AT Fri 01 Mar 2024 09:59:02 PM EET [Status=0]
./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean  -makeonly
ENDED(3) AT Fri 01 Mar 2024 10:11:51 PM EET [Status=0]
./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst  -makeonly
ENDED(4) AT Fri 01 Mar 2024 10:14:10 PM EET [Status=0]
SKIP './tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common  -makeonly'
ENDED(5) AT Fri 01 Mar 2024 10:14:10 PM EET [Status=0]
./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common  -makeonly
ENDED(6) AT Fri 01 Mar 2024 10:16:26 PM EET [Status=0]

(2) Step 2 - run tests on worker nodes (~1h30)

./tput/allTees.sh -hip

STARTED  AT Sun 03 Mar 2024 01:29:52 PM EET
./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean
ENDED(1) AT Sun 03 Mar 2024 02:22:12 PM EET [Status=2]
./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean
ENDED(2) AT Sun 03 Mar 2024 02:39:13 PM EET [Status=0]
./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean
ENDED(3) AT Sun 03 Mar 2024 02:58:20 PM EET [Status=2]
./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst
ENDED(4) AT Sun 03 Mar 2024 03:02:06 PM EET [Status=0]
SKIP './tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common '
ENDED(5) AT Sun 03 Mar 2024 03:02:06 PM EET [Status=0]
./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common
ENDED(6) AT Sun 03 Mar 2024 03:05:50 PM EET [Status=0]

./tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0_bridge.txt:Backtrace for this error:
./tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0_bridge.txt:ERROR! Fortran calculation (F77/CUDA) crashed
./tput/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd1.txt:Backtrace for this error:
./tput/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd1.txt:ERROR! Fortran calculation (F77/CUDA) crashed
./tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd1.txt:Backtrace for this error:
./tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd1.txt:ERROR! Fortran calculation (F77/CUDA) crashed
./tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt:Backtrace for this error:
./tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt:ERROR! Fortran calculation (F77/CUDA) crashed
./tput/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt:Backtrace for this error:
./tput/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt:ERROR! Fortran calculation (F77/CUDA) crashed
./tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd1.txt:Backtrace for this error:
./tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd1.txt:ERROR! Fortran calculation (F77/CUDA) crashed
./tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt:Backtrace for this error:
./tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt:ERROR! Fortran calculation (F77/CUDA) crashed
./tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0_bridge.txt:Backtrace for this error:
./tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0_bridge.txt:ERROR! Fortran calculation (F77/CUDA) crashed
(1) all tests but ggttggg

STARTED AT Sun 03 Mar 2024 04:32:31 PM EET
ENDED   AT Sun 03 Mar 2024 05:04:29 PM EET

(2) ggttggg tests only

STARTED AT Sun 03 Mar 2024 04:53:00 PM EET
ENDED   AT Sun 03 Mar 2024 07:28:33 PM EET

Status=0

16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_d_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_f_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_m_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_d_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_f_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_m_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_d_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_f_inl0_hrd0.txt
16 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_m_inl0_hrd0.txt
12 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt
12 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt
12 /users/valassia/GPU2023/madgraph4gpu2/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt
git checkout f4d951c tput/logs_* tmad/logs_*
…no GPU, but a Gold AVX512 CPU

(Eventually the outputs of this test will be split between CPU and GPU...)
…no GPU, but a Gold AVX512 CPU

(Eventually the outputs of this test will be split between CPU and GPU...)
git checkout f4d951c tput/logs_* tmad/logs_*
./CODEGEN/generateAndCompare.sh susy_gg_tttt -c 'import model MSSM_SLHA2; generate g g > t t~ t t~'
CUDACPP_RUNTEST_DUMPEVENTS=1 ./runTest.exe
cp ../../test/ref/dump_CPUTest.Sigma_MSSM_SLHA2_gg_ttxttx.txt ../../../CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/test/ref/
./CODEGEN/generateAndCompare.sh susy_gg_gogo -c 'import model MSSM_SLHA2; generate g g > go go'
HRDCOD=1 make -j
CUDACPP_RUNTEST_DUMPEVENTS=1 ./runTest.exe
cp ../../test/ref/dump_CPUTest.Sigma_MSSM_SLHA2_gg_gogo.txt ../../../CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/test/ref/

NB: this process builds only in HRDCOD=1... for HRDCOD=0 the build fails as follows

ccache g++  -O3  -std=c++17 -I. -I../../src -Wall -Wshadow -Wextra -ffast-math  -fopenmp  -march=skylake-avx512 -mprefer-vector-width=256  -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -fPIC -c CPPProcess.cc -o CPPProcess.o
CPPProcess.cc: In member function ‘virtual void mg5amcCpu::CPPProcess::initProc(const string&)’:
CPPProcess.cc:554:38: error: ‘class mg5amcCpu::Parameters_MSSM_SLHA2’ has no member named ‘mdl_bsmIndepParam’; did you mean ‘nBsmIndepParam’?
  554 |       memcpy( bsmIndepParam, m_pars->mdl_bsmIndepParam, Parameters_MSSM_SLHA2::nBsmIndepParam * sizeof( double ) );
      |                                      ^~~~~~~~~~~~~~~~~
      |                                      nBsmIndepParam
…susy_gq_ttq

./CODEGEN/generateAndCompare.sh susy_gq_ttq -c 'import model MSSM_SLHA2; define q = u c d s u~ c~ d~ s~; generate g q > t t~ q'
CUDACPP_RUNTEST_DUMPEVENTS=1 ./runTest.exe
cp ../../test/ref/dump_CPUTest.Sigma_MSSM_SLHA2_*txt ../../../CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/test/ref/
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valassi commented Mar 3, 2024

Hi @oliviermattelaer I confirm that this is ready to be merged.

NB This fixes gg_tt and gq_ttq in SUSY (so not even SUSY processes itself), and partly gg_gogo. But many other issues remain, see #820. I would still suggest to merge this one already, and then investigate the rest later on.

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valassi commented Mar 12, 2024

Note: this is a standalone PR but is also included in #824, which adds additional fixes for SUSY.

Rephrasing:

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Here I'm struggling to understand two points (sorry for that)

  • what is problematic/special with the width of majorana particle? (i.e. do we really need to separate those from the other widths?)
  • What is the issue with BSM coupling? They should also split in running/non running coupling (like the SM does)?

Typically, I try to avoid to single out SM compare to BSM model (my typical strategy is saying that SM is a BSM model like any other), but this is not a require strategy.
However, using the model name to check for SM model is likely a bad idea since model can be loop_sm and still be SM ... (and the opposite is True too, as written in one comment)

I will check some of the issue linked to see if I can figure it out on my own but comment on this already (maybe I should have done the opposite, sorry in case)

…_parameters (fix my wrong comment about std::complex string replace - thanks to Olivier for pointing this out)
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valassi commented Mar 14, 2024

Here I'm struggling to understand two points (sorry for that)

No need to be sorry!

* what is problematic/special with the width of majorana particle? (i.e. do we really need to separate those from the other widths?)

What is special is that there is a need for some code that does "if mass<0 then width=-width", i.e. if the mass is less than 0 then also the width is less than 0.

What is problematic is that, before various fixes, there were some code generation errors. I saw this in #622 for cudacpp, while Walter and Nathan also sa it in #694 for the SYCL plugin.

Now, why I chose to split one python method into two methods "without Majorana fixes" and "only apply Majorana fixes", unfortunately I do not remember. Maybe I could have kept those in the same method, I am not sure. The good thing is that the patch works and fixed some issues.

On top of this, in addition to #622 codegen error "ValueError : not enough values to unpack", later on I got some other errors specific to this code. One was for instance that, in the HRDCOD=1 setup, you cannot right "if m<0 then w=-w", because this is not a constexpr assignment. So I rewrote this as "w = ( m<0 ? -absw : + absw )" or something similar.

Finally, note that the "if mass<0 then width=-width" machinery is something that I found in the original code, I did not write it myself (it comes from UFO? from code you wrote? no idea...). I just made sure that the logic works ok now in all codegen and builds.

Does this answer your question?

* What is the issue with BSM coupling? They should also split in running/non running coupling (like the SM does)?

Listen, here I also have a hard time myself. I have done enough reverse engineering to fix the issues, but I must say that I still do not understand the logic. "Experimentally", I just see that BSM models introduce some parameters that are handled by very different parts of the python code, at different moments in time.

We should probably sit down and take a look at some point...?

If you want to get a better idea, anyway, I suggest you look at what appears in a generated SUSY process. For instance compare susy gg to stop pairs with SM gg to top pairs? This is from the more recent PR #824,
https://github.com/valassi/madgraph4gpu/blob/susy/epochX/cudacpp/susy_gg_t1t1.sa/src/Parameters_MSSM_SLHA2.h
https://github.com/valassi/madgraph4gpu/blob/susy/epochX/cudacpp/susy_gg_t1t1.sa/src/Parameters_MSSM_SLHA2.cc
https://github.com/valassi/madgraph4gpu/blob/susy/epochX/cudacpp/susy_gg_t1t1.sa/SubProcesses/P1_Sigma_MSSM_SLHA2_gg_t1t1x/CPPProcess.cc
vs
https://github.com/valassi/madgraph4gpu/blob/susy/epochX/cudacpp/gg_tt.sa/src/Parameters_sm.h
https://github.com/valassi/madgraph4gpu/blob/susy/epochX/cudacpp/gg_tt.sa/src/Parameters_sm.cc
https://github.com/valassi/madgraph4gpu/blob/susy/epochX/cudacpp/gg_tt.sa/SubProcesses/P1_Sigma_sm_gg_ttx/CPPProcess.cc

What is especially interesting are the Parameters.h and the CPPProcess.cc files. (The Parameters.cc is less interesting).

I think that in the end there are three main differences? maybe I am missing some

  • the majorana stuff already discussed, something here is unavoidable
  • the fact that SIMD vectors of floats need some special handling (issue Fix heft generation after alphas PR: more fundamentally, remove reading of param_card.dat? #439... this I fixed almost two years ago, May 2022, so I do not remember the details), something here is also unavoidable I guess
  • the fact that there are some parameters double mdl_bsmIndepParam[nBsmIndepParam] = { mdl_I52x33.real(), mdl_I52x33.imag(), mdl_I51x33.real(), mdl_I51x33.imag(), mdl_I75x33.real(), mdl_I75x33.imag(), mdl_I74x33.real(), mdl_I74x33.imag(), mdl_I52x36.real(), mdl_I52x36.imag(), mdl_I51x36.real(), mdl_I51x36.imag() }; that I copy to constant memory like we do for cIPC SM parameters, but which do not go through the same code... a legitimate question is, "could we not handle those like the cIPC?", the answer maybe is yes, but somehow the code that manages the cIPC does not manage them...? again, I got lost in the overall logic of the python, which function controls which parameters

Along the same lines, one other thing that so far I was unable to understand is the order in which these parameters are discovered, and the collaboration bwteen the UFOconverter, the HelasWriter and the other classes. In particular, I have this ugly comment, which shows that I do not completely master the order of generation of Parameters.h and CPPProcess.cc

  // AV Jan 2024 (PR #625): this ugly #define was the only way I found to avoid creating arrays[nBsm] in CPPProcess.cc if nBsm is 0
  // The problem is that nBsm is determined when generating Parameters.h, which happens after CPPProcess.cc has already been generated
  // For simplicity, keep this code hardcoded also for SM processes (a nullptr is needed as in the case nBsm == 0)
#ifdef MGONGPUCPP_NBSMINDEPPARAM_GT_0

Anyway, as above: it works now! So, it can be kept as a cleanup for later... unless you see obvious ways to improve this fast.

Typically, I try to avoid to single out SM compare to BSM model (my typical strategy is saying that SM is a BSM model like any other), but this is not a require strategy. However, using the model name to check for SM model is likely a bad idea since model can be loop_sm and still be SM ... (and the opposite is True too, as written in one comment)

Ok yes I agree, as written in the comment above. I can try to apply the "special handling" all the time, and see if it still produces SM code which makes sense.

I will check some of the issue linked to see if I can figure it out on my own but comment on this already (maybe I should have done the opposite, sorry in case)

Voila I commented on everything, hope this helps. I am sure you have many comments on my comments...

Thanks!

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Ok thanks a lot,

This is helpfull, Maybe the only change that need to be done (but not required to be done in this PR) is to run all the BSM trick for the SM model as well and check that SM is still working correctly.

We can also sit together on Friday to see if I can design a quick and nice way to fix your issue with those coupling. But, I guess that the answer will not be quick...

One reason of the complexity is that the structure of the code is likely:

  1. read the UFO model -> convert it to a MG5 object
  2. potential optimization of the model by MG5
  3. generate the diagrams
  4. generate the helas call -> write the process file
  5. retrieve from step 3 or 4 the list of couplings/lorentz structure needed for the particular process and create code to compute only such list. (Note that all parameters are handle separetly and likely do not have such optimization ...)

So I guess the confusion might partly comes from the difference between coupling and parameter (and the difference is in a way arbitrary) and the fact that some parameter can/should be real (coupling should always be treated as complex --even if they might sometimes/often be real or pure imaginary--).

But in itself you can consider this as an approve :-)

Cheers and thanks,

Olivier

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valassi commented Mar 15, 2024

Ok thanks a lot,

This is helpfull, Maybe the only change that need to be done (but not required to be done in this PR) is to run all the BSM trick for the SM model as well and check that SM is still working correctly.
...

But in itself you can consider this as an approve :-)

Cheers and thanks,

Olivier

Hi Olivier, thanks!
LIsten, I would do the following:

Does this sound ok?

We can also sit together on Friday to see if I can design a quick and nice way to fix your issue with those coupling. But, I guess that the answer will not be quick...

Thanks, it would help to sit down together. But today I am just too busy, maybe next week?

One reason of the complexity is that the structure of the code is likely:

1. read the UFO model -> convert it to a MG5 object

2. potential optimization of the model by MG5

3. generate the diagrams

4. generate the helas call -> write the process file

5. retrieve from step 3 or 4 the list of couplings/lorentz structure needed for the particular process and create code to compute only such list. (Note that all parameters are handle separetly and likely do not have such optimization ...)

So I guess the confusion might partly comes from the difference between coupling and parameter (and the difference is in a way arbitrary) and the fact that some parameter can/should be real (coupling should always be treated as complex --even if they might sometimes/often be real or pure imaginary--).

I will add these comments to #824 so that we have them there for further discussion.

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valassi commented Mar 15, 2024

Ok thanks a lot,
This is helpfull, Maybe the only change that need to be done (but not required to be done in this PR) is to run all the BSM trick for the SM model as well and check that SM is still working correctly.
...
But in itself you can consider this as an approve :-)
Cheers and thanks,
Olivier

Hi Olivier, thanks! Listen, I would do the following:

* consider this PR #625  as approved and merge it

I will do the above: consider this as approved, and merge it.

I will move the pending comments and todo to #824.

@valassi valassi merged commit 4f96b82 into madgraph5:master Mar 15, 2024
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valassi added a commit to valassi/madgraph4gpu that referenced this pull request Mar 15, 2024
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