pitnrun: use new MC68705P5 device

m68705: expose more more internal registers through the state interface
* shows contents of registers that can't be read by program code

i8251: make receive more reliable clean up a little

zorba: meat on the bones
* create emulated keyboard device
  - 88 of 96 matrix keys identified, 6 of 8 DIP switches identified, 3 of 6 outputs identified
* connect IEEE-488, RS232 and Centronics ports
* hook up all IRQ sources and connect PIT to UARTs
* more notes

osborne1, gladiatr: use input changed member (nw)

scripts/target/mame/mess.lua

@@ -3422,6 +3422,9 @@ files {
 	MAME_DIR .. "src/mame/includes/xor100.h",
 	MAME_DIR .. "src/mame/drivers/xavix.cpp",
 	MAME_DIR .. "src/mame/drivers/zorba.cpp",
+	MAME_DIR .. "src/mame/includes/zorba.h",
+	MAME_DIR .. "src/mame/machine/zorbakbd.cpp",
+	MAME_DIR .. "src/mame/machine/zorbakbd.h",
 }
 
 end

src/devices/cpu/m6805/m68705.cpp

@@ -569,6 +569,30 @@ void m68705_new_device::burn_cycles(unsigned count)
 	}
 }
 
+template <std::size_t N> void m68705_new_device::add_port_latch_state()
+{
+	state_add(M68705_LATCHA + N, util::string_format("LATCH%c", 'A' + N).c_str(), m_port_latch[N]).mask(~m_port_mask[N] & 0xff);
+}
+
+template <std::size_t N> void m68705_new_device::add_port_ddr_state()
+{
+	state_add(M68705_DDRA + N, util::string_format("DDR%c", 'A' + N).c_str(), m_port_ddr[N]).mask(~m_port_mask[N] & 0xff);
+}
+
+void m68705_new_device::add_timer_state()
+{
+	state_add(M68705_PS, "PS", m_prescaler).mask(0x7f);
+	state_add(M68705_TDR, "TDR", m_tdr).mask(0xff);
+	state_add(M68705_TCR, "TCR", m_tcr).mask(0xff);
+}
+
+void m68705_new_device::add_eprom_state()
+{
+	state_add(M68705_PCR, "PCR", m_pcr).mask(0xff);
+	state_add(M68705_PLA, "PLA", m_pl_addr).mask(0xffff);
+	state_add(M68705_PLD, "PLD", m_pl_data).mask(0xff);
+}
+
 
 /****************************************************************************
  * M68705Px family
@@ -613,6 +637,21 @@ m68705p_device::m68705p_device(
 	set_port_mask<3>(0xff);         // Port D isn't present
 }
 
+void m68705p_device::device_start()
+{
+	m68705_new_device::device_start();
+
+	add_port_latch_state<0>();
+	add_port_latch_state<1>();
+	add_port_latch_state<2>();
+	add_port_ddr_state<0>();
+	add_port_ddr_state<1>();
+	add_port_ddr_state<2>();
+	add_timer_state();
+	add_eprom_state();
+	state_add(M68705_MOR, "MOR", get_user_rom()[0x0784]).mask(0xff);
+}
+
 offs_t m68705p_device::disasm_disassemble(
 		std::ostream &stream,
 		offs_t pc,
@@ -680,6 +719,24 @@ m68705u_device::m68705u_device(
 {
 }
 
+void m68705u_device::device_start()
+{
+	m68705_new_device::device_start();
+
+	add_port_latch_state<0>();
+	add_port_latch_state<1>();
+	add_port_latch_state<2>();
+	add_port_latch_state<3>();
+	add_port_ddr_state<0>();
+	add_port_ddr_state<1>();
+	add_port_ddr_state<2>();
+	add_timer_state();
+	add_eprom_state();
+	state_add(M68705_MOR, "MOR", get_user_rom()[0x0f38]).mask(0xff);
+
+	// TODO: MISC register
+}
+
 offs_t m68705u_device::disasm_disassemble(
 		std::ostream &stream,
 		offs_t pc,
@@ -734,6 +791,13 @@ m68705r_device::m68705r_device(
 {
 }
 
+void m68705r_device::device_start()
+{
+	m68705u_device::device_start();
+
+	// TODO: ADC
+}
+
 offs_t m68705r_device::disasm_disassemble(
 		std::ostream &stream,
 		offs_t pc,
@@ -801,7 +865,7 @@ tiny_rom_entry const *m68705r3_device::device_rom_region() const
 
 u8 m68705r3_device::get_mask_options() const
 {
-	return get_user_rom()[0x0784] & 0xf7; // no SNM bit
+	return get_user_rom()[0x0f38] & 0xf7; // no SNM bit
 }
 
 
@@ -821,5 +885,5 @@ tiny_rom_entry const *m68705u3_device::device_rom_region() const
 
 u8 m68705u3_device::get_mask_options() const
 {
-	return get_user_rom()[0x0784] & 0xf7; // no SNM bit
+	return get_user_rom()[0x0f38] & 0xf7; // no SNM bit
 }

src/devices/cpu/m6805/m68705.h

@@ -92,6 +92,28 @@ class m68705_new_device : public m68705_device, public device_nvram_interface
 	{ return downcast<m68705_new_device &>(device).m_port_cb_w[N].set_callback(std::forward<Object>(obj)); }
 
 protected:
+	enum
+	{
+		M68705_LATCHA = 0x10,
+		M68705_LATCHB,
+		M68705_LATCHC,
+		M68705_LATCHD,
+		M68705_DDRA,
+		M68705_DDRB,
+		M68705_DDRC,
+		M68705_DDRD,
+
+		M68705_PS,
+		M68705_TDR,
+		M68705_TCR,
+
+		M68705_PCR,
+		M68705_PLD,
+		M68705_PLA,
+
+		M68705_MOR
+	};
+
 	enum
 	{
 		PORT_COUNT = 4
@@ -148,6 +170,11 @@ class m68705_new_device : public m68705_device, public device_nvram_interface
 	u8 *const get_user_rom() const { return &m_user_rom[0]; }
 	virtual u8 get_mask_options() const = 0;
 
+	template <std::size_t N> void add_port_latch_state();
+	template <std::size_t N> void add_port_ddr_state();
+	void add_timer_state();
+	void add_eprom_state();
+
 private:
 	bool    tcr_tir() const     { return BIT(m_tcr, 7); }
 	bool    tcr_tim() const     { return BIT(m_tcr, 6); }
@@ -206,6 +233,8 @@ class m68705p_device : public m68705_new_device
 			char const *shortname,
 			char const *source);
 
+	virtual void device_start() override;
+
 	virtual offs_t disasm_disassemble(
 			std::ostream &stream,
 			offs_t pc,
@@ -248,6 +277,8 @@ class m68705u_device : public m68705_new_device
 			char const *shortname,
 			char const *source);
 
+	virtual void device_start() override;
+
 	virtual offs_t disasm_disassemble(
 			std::ostream &stream,
 			offs_t pc,
@@ -277,6 +308,8 @@ class m68705r_device : public m68705u_device
 			char const *shortname,
 			char const *source);
 
+	virtual void device_start() override;
+
 	virtual offs_t disasm_disassemble(
 			std::ostream &stream,
 			offs_t pc,