2200b6

akiko.cpp

@@ -29,8 +29,8 @@
 #include "newcpu.h"
 
 #define AKIKO_DEBUG_NVRAM 0
-#define AKIKO_DEBUG_IO 1
-#define AKIKO_DEBUG_IO_CMD 1
+#define AKIKO_DEBUG_IO 0
+#define AKIKO_DEBUG_IO_CMD 0
 
 // 43 48 49 4E 4F 4E 20 20 4F 2D 36 35 38 2D 32 20 32 34
 #define FIRMWAREVERSION "CHINON  O-658-2 24"
@@ -1788,9 +1788,9 @@ uae_u8 *restore_akiko (uae_u8 *src)
 	uae_u32 v;
 	int i;
 
-	if (!currprefs.cs_cd32cd) {
-		changed_prefs.cs_cd32c2p = changed_prefs.cs_cd32cd = changed_prefs.cs_cd32nvram = 1;
-		currprefs.cs_cd32c2p = currprefs.cs_cd32cd = currprefs.cs_cd32nvram = 1;
+	if (!currprefs.cs_cd32cd || !cdromok) {
+		changed_prefs.cs_cd32c2p = changed_prefs.cs_cd32cd = changed_prefs.cs_cd32nvram = true;
+		currprefs.cs_cd32c2p = currprefs.cs_cd32cd = currprefs.cs_cd32nvram = true;
 		akiko_init ();
 	}
 

audio.cpp

@@ -221,10 +221,10 @@ static void do_samplerip (struct audio_channel_data *adp)
 {
 	struct ripped_sample *rs = ripped_samples, *prev;
 	int len = adp->len * 2;
-	uae_u8 *smp = chipmem_bank.xlateaddr (adp->pt);
+	uae_u8 *smp = chipmem_xlate_indirect (adp->pt);
 	int cnt = 0, i;
 
-	if (!smp || !chipmem_bank.check (adp->pt, len))
+	if (!smp || !chipmem_check_indirect (adp->pt, len))
 		return;
 	for (i = 0; i < len; i++) {
 		if (smp[i] != 0)
@@ -1644,7 +1644,7 @@ void audio_hsync (int hpos)
 					write_log (L"%d:>5: LEN=%d PT=%08X\n", nr, cdp->wlen, cdp->pt);
 #endif
 			}
-			cdp->dat2 = last_custom_value1 = chipmem_agnus_wget (cdp->pt);
+			cdp->dat2 = last_custom_value1 = chipmem_wget_indirect (cdp->pt);
 			if (cdp->request_word >= 2)
 				handle2 = 1;
 			if (chan_ena) {

autoconf.cpp

@@ -197,6 +197,8 @@ static uae_u32 REGPARAM2 nullfunc (TrapContext *context)
 
 static uae_u32 REGPARAM2 getchipmemsize (TrapContext *context)
 {
+	m68k_dreg (regs, 1) = allocated_z3chipmem;
+	m68k_areg (regs, 1) = z3chipmem_start;
 	return allocated_chipmem;
 }
 

blitter.cpp

@@ -297,10 +297,10 @@ static void blitter_interrupt (int hpos, int done)
 {
 	if (blit_interrupt)
 		return;
-	if (!done && (!currprefs.blitter_cycle_exact || (currprefs.chipset_mask & CSMASK_AGA)))
+	if (!done && (!currprefs.blitter_cycle_exact || currprefs.cpu_model >= 68020))
 		return;
 	blit_interrupt = 1;
-	send_interrupt (6, 3);
+	send_interrupt (6, 3 * CYCLE_UNIT);
 	if (debug_dma)
 		record_dma_event (DMA_EVENT_BLITIRQ, hpos, vpos);
 }
@@ -325,7 +325,7 @@ STATIC_INLINE void chipmem_agnus_wput2 (uaecptr addr, uae_u32 w)
 {
 	last_custom_value1 = w;
 #ifndef BLITTER_DEBUG_NO_D
-	chipmem_agnus_wput (addr, w);
+	chipmem_wput_indirect (addr, w);
 #endif
 }
 
@@ -372,7 +372,7 @@ static void blitter_dofast (void)
 				uae_u32 bltadat, blitahold;
 				uae_u16 bltbdat;
 				if (bltadatptr) {
-					blt_info.bltadat = bltadat = chipmem_agnus_wget (bltadatptr);
+					blt_info.bltadat = bltadat = chipmem_wget_indirect (bltadatptr);
 					bltadatptr += 2;
 				} else
 					bltadat = blt_info.bltadat;
@@ -381,14 +381,14 @@ static void blitter_dofast (void)
 				preva = bltadat;
 
 				if (bltbdatptr) {
-					blt_info.bltbdat = bltbdat = chipmem_agnus_wget (bltbdatptr);
+					blt_info.bltbdat = bltbdat = chipmem_wget_indirect (bltbdatptr);
 					bltbdatptr += 2;
 					blitbhold = (((uae_u32)prevb << 16) | bltbdat) >> blt_info.blitbshift;
 					prevb = bltbdat;
 				}
 
 				if (bltcdatptr) {
-					blt_info.bltcdat = chipmem_agnus_wget (bltcdatptr);
+					blt_info.bltcdat = chipmem_wget_indirect (bltcdatptr);
 					bltcdatptr += 2;
 				}
 				if (dodst)
@@ -471,7 +471,7 @@ static void blitter_dofast_desc (void)
 				uae_u32 bltadat, blitahold;
 				uae_u16 bltbdat;
 				if (bltadatptr) {
-					bltadat = blt_info.bltadat = chipmem_agnus_wget (bltadatptr);
+					bltadat = blt_info.bltadat = chipmem_wget_indirect (bltadatptr);
 					bltadatptr -= 2;
 				} else
 					bltadat = blt_info.bltadat;
@@ -480,14 +480,14 @@ static void blitter_dofast_desc (void)
 				preva = bltadat;
 
 				if (bltbdatptr) {
-					blt_info.bltbdat = bltbdat = chipmem_agnus_wget (bltbdatptr);
+					blt_info.bltbdat = bltbdat = chipmem_wget_indirect (bltbdatptr);
 					bltbdatptr -= 2;
 					blitbhold = (((uae_u32)bltbdat << 16) | prevb) >> blt_info.blitdownbshift;
 					prevb = bltbdat;
 				}
 
 				if (bltcdatptr) {
-					blt_info.bltcdat = blt_info.bltbdat = chipmem_agnus_wget (bltcdatptr);
+					blt_info.bltcdat = blt_info.bltbdat = chipmem_wget_indirect (bltcdatptr);
 					bltcdatptr -= 2;
 				}
 				if (dodst)
@@ -533,7 +533,7 @@ STATIC_INLINE void blitter_read (void)
 	if (bltcon0 & 0x200) {
 		if (!dmaen (DMA_BLITTER))
 			return;
-		blt_info.bltcdat = chipmem_bank.wget (bltcpt);
+		blt_info.bltcdat = chipmem_wget_indirect (bltcpt);
 		last_custom_value1 = blt_info.bltcdat;
 	}
 	bltstate = BLT_work;
@@ -548,7 +548,7 @@ STATIC_INLINE void blitter_write (void)
 		if (!dmaen (DMA_BLITTER))
 			return;
 		last_custom_value1 = blt_info.bltddat;
-		chipmem_bank.wput (bltdpt, blt_info.bltddat);
+		chipmem_wput_indirect (bltdpt, blt_info.bltddat);
 	}
 	bltstate = BLT_next;
 }
@@ -870,14 +870,14 @@ STATIC_INLINE void blitter_dodma (int ch, int hpos)
 	switch (ch)
 	{
 	case 1:
-		blt_info.bltadat = dat = chipmem_agnus_wget (bltapt);
+		blt_info.bltadat = dat = chipmem_wget_indirect (bltapt);
 		last_custom_value1 = blt_info.bltadat;
 		addr = bltapt;
 		bltapt += blit_add;
 		reg = 0x74;
 		break;
 	case 2:
-		blt_info.bltbdat = dat = chipmem_agnus_wget (bltbpt);
+		blt_info.bltbdat = dat = chipmem_wget_indirect (bltbpt);
 		last_custom_value1 = blt_info.bltbdat;
 		addr = bltbpt;
 		bltbpt += blit_add;
@@ -889,7 +889,7 @@ STATIC_INLINE void blitter_dodma (int ch, int hpos)
 		reg = 0x72;
 		break;
 	case 3:
-		blt_info.bltcdat = dat = chipmem_agnus_wget (bltcpt);
+		blt_info.bltcdat = dat = chipmem_wget_indirect (bltcpt);
 		last_custom_value1 = blt_info.bltcdat;
 		addr = bltcpt;
 		bltcpt += blit_add;
@@ -971,7 +971,7 @@ void decide_blitter (int hpos)
 	if (blt_delayed_irq > 0 && hsync) {
 		blt_delayed_irq--;
 		if (!blt_delayed_irq)
-			send_interrupt (6, 2);
+			send_interrupt (6, 2 * CYCLE_UNIT);
 	}
 
 	if (bltstate == BLT_done)

cfgfile.cpp

@@ -801,6 +801,7 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
 	cfgfile_write (f, L"mbresmem_size", L"%d", p->mbresmem_high_size / 0x100000);
 	cfgfile_write (f, L"z3mem_size", L"%d", p->z3fastmem_size / 0x100000);
 	cfgfile_write (f, L"z3mem2_size", L"%d", p->z3fastmem2_size / 0x100000);
+	cfgfile_write (f, L"z3chipmem_size", L"%d", p->z3chipmem_size / 0x100000);
 	cfgfile_write (f, L"z3mem_start", L"0x%x", p->z3fastmem_start);
 	cfgfile_write (f, L"bogomem_size", L"%d", p->bogomem_size / 0x40000);
 	cfgfile_write (f, L"gfxcard_size", L"%d", p->gfxmem_size / 0x100000);
@@ -1766,6 +1767,7 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, TCHAR *option, TCHAR *va
 		|| cfgfile_intval (option, value, L"mbresmem_size", &p->mbresmem_high_size, 0x100000)
 		|| cfgfile_intval (option, value, L"z3mem_size", &p->z3fastmem_size, 0x100000)
 		|| cfgfile_intval (option, value, L"z3mem2_size", &p->z3fastmem2_size, 0x100000)
+		|| cfgfile_intval (option, value, L"z3chipmem_size", &p->z3chipmem_size, 0x100000)
 		|| cfgfile_intval (option, value, L"z3mem_start", &p->z3fastmem_start, 1)
 		|| cfgfile_intval (option, value, L"bogomem_size", &p->bogomem_size, 0x40000)
 		|| cfgfile_intval (option, value, L"gfxcard_size", &p->gfxmem_size, 0x100000)
@@ -3597,6 +3599,7 @@ static void buildin_default_prefs (struct uae_prefs *p)
 	p->mbresmem_high_size = 0x00000000;
 	p->z3fastmem_size = 0x00000000;
 	p->z3fastmem2_size = 0x00000000;
+	p->z3chipmem_size = 0x00000000;
 	p->gfxmem_size = 0x00000000;
 
 	p->cs_rtc = 0;

cia.cpp

@@ -92,15 +92,15 @@ static void RethinkICRA (void)
 {
 	if (ciaaimask & ciaaicr) {
 		ciaaicr |= 0x80;
-		send_interrupt (3, 3);
+		send_interrupt (3, 2 * CYCLE_UNIT + CYCLE_UNIT / 2);
 	}
 }
 
 static void RethinkICRB (void)
 {
 	if (ciabimask & ciabicr) {
 		ciabicr |= 0x80;
-		send_interrupt (13, 3);
+		send_interrupt (13, 2 * CYCLE_UNIT + CYCLE_UNIT / 2);
 	}
 }
 

custom.cpp

@@ -472,13 +472,13 @@ static void update_mirrors (void)
 
 STATIC_INLINE uae_u8 *pfield_xlateptr (uaecptr plpt, int bytecount)
 {
-	if (!chipmem_bank.check (plpt, bytecount)) {
+	if (!chipmem_check_indirect (plpt, bytecount)) {
 		static int count = 0;
 		if (!count)
 			count++, write_log (L"Warning: Bad playfield pointer\n");
 		return NULL;
 	}
-	return chipmem_bank.xlateaddr (plpt);
+	return chipmem_xlate_indirect (plpt);
 }
 
 STATIC_INLINE void docols (struct color_entry *colentry)
@@ -1073,21 +1073,21 @@ STATIC_INLINE void fetch (int nr, int fm, int hpos)
 			bpl1dat_written = 1;
 #ifdef DEBUGGER
 		if (debug_dma)
-			record_dma (0x110 + nr * 2, chipmem_agnus_wget (p), p, hpos, vpos, DMARECORD_BITPLANE);
+			record_dma (0x110 + nr * 2, chipmem_wget_indirect (p), p, hpos, vpos, DMARECORD_BITPLANE);
 #endif
 		switch (fm)
 		{
 		case 0:
-			fetched[nr] = bplxdat[nr] = last_custom_value1 = chipmem_agnus_wget (p);
+			fetched[nr] = bplxdat[nr] = last_custom_value1 = chipmem_wget_indirect (p);
 			break;
 #ifdef AGA
 		case 1:
-			fetched_aga0[nr] = chipmem_lget (p);
+			fetched_aga0[nr] = chipmem_lget_indirect (p);
 			last_custom_value1 = (uae_u16)fetched_aga0[nr];
 			break;
 		case 2:
-			fetched_aga1[nr] = chipmem_lget (p);
-			fetched_aga0[nr] = chipmem_lget (p + 4);
+			fetched_aga1[nr] = chipmem_lget_indirect (p);
+			fetched_aga0[nr] = chipmem_lget_indirect (p + 4);
 			last_custom_value1 = (uae_u16)fetched_aga0[nr];
 			break;
 #endif
@@ -3119,8 +3119,8 @@ static void immediate_copper (int num)
 			break;
 		pos++;
 		oldpos = pos;
-		cop_state.i1 = chipmem_agnus_wget (cop_state.ip);
-		cop_state.i2 = chipmem_agnus_wget (cop_state.ip + 2);
+		cop_state.i1 = chipmem_wget_indirect (cop_state.ip);
+		cop_state.i2 = chipmem_wget_indirect (cop_state.ip + 2);
 		cop_state.ip += 4;
 		if (!(cop_state.i1 & 1)) { // move
 			cop_state.i1 &= 0x1fe;
@@ -3397,7 +3397,7 @@ void send_interrupt (int num, int delay)
 {
 	if (use_eventmode (0x8000) && delay > 0) {
 		if (!(intreq & (1 << num)))
-			event2_newevent_xx (-1, delay * CYCLE_UNIT, num, send_interrupt_do);
+			event2_newevent_xx (-1, delay, num, send_interrupt_do);
 	} else {
 		send_interrupt_do (num);
 	}
@@ -3891,9 +3891,9 @@ static void BLTSIZH (int hpos, uae_u16 v)
 	maybe_blit (hpos, 0);
 	blt_info.hblitsize = v & 0x7FF;
 	if (!blt_info.vblitsize)
-		blt_info.vblitsize = 32768;
+		blt_info.vblitsize = 0x8000;
 	if (!blt_info.hblitsize)
-		blt_info.hblitsize = 0x800;
+		blt_info.hblitsize = 0x0800;
 	do_blitter (hpos, copper_access);
 }
 
@@ -4330,7 +4330,7 @@ static void update_copper (int until_hpos)
 			alloc_cycle (old_hpos, CYCLE_COPPER);
 #ifdef DEBUGGER
 			if (debug_dma)
-				record_dma (0x8c, chipmem_agnus_wget (cop_state.ip), cop_state.ip, old_hpos, vpos, DMARECORD_COPPER);
+				record_dma (0x8c, chipmem_wget_indirect (cop_state.ip), cop_state.ip, old_hpos, vpos, DMARECORD_COPPER);
 #endif
 			cop_state.ip += 2;
 			break;
@@ -4343,7 +4343,7 @@ static void update_copper (int until_hpos)
 			cop_state.state = COP_read1;
 			alloc_cycle (old_hpos, CYCLE_COPPER);
 			if (debug_dma)
-				record_dma (0x1fe, chipmem_agnus_wget (cop_state.ip), cop_state.ip, old_hpos, vpos, DMARECORD_COPPER);
+				record_dma (0x1fe, chipmem_wget_indirect (cop_state.ip), cop_state.ip, old_hpos, vpos, DMARECORD_COPPER);
 			// next cycle finally reads from new pointer
 			if (cop_state.strobe == 1)
 				cop_state.ip = cop1lc;
@@ -4364,7 +4364,7 @@ static void update_copper (int until_hpos)
 		case COP_read1:
 			if (copper_cant_read (old_hpos, 1))
 				continue;
-			cop_state.i1 = last_custom_value1 = chipmem_agnus_wget (cop_state.ip);
+			cop_state.i1 = last_custom_value1 = chipmem_wget_indirect (cop_state.ip);
 			alloc_cycle (old_hpos, CYCLE_COPPER);
 #ifdef DEBUGGER
 			if (debug_dma)
@@ -4377,7 +4377,7 @@ static void update_copper (int until_hpos)
 		case COP_read2:
 			if (copper_cant_read (old_hpos, 1))
 				continue;
-			cop_state.i2 = last_custom_value1 = chipmem_agnus_wget (cop_state.ip);
+			cop_state.i2 = last_custom_value1 = chipmem_wget_indirect (cop_state.ip);
 			alloc_cycle (old_hpos, CYCLE_COPPER);
 			cop_state.ip += 2;
 			cop_state.saved_i1 = cop_state.i1;
@@ -4663,7 +4663,7 @@ STATIC_INLINE uae_u16 sprite_fetch (struct sprite *s, int dma, int hpos, int cyc
 	if (dma) {
 		if (cycle && currprefs.cpu_cycle_exact)
 			s->ptxhpos = hpos;
-		data = last_custom_value1 = chipmem_agnus_wget (s->pt);
+		data = last_custom_value1 = chipmem_wget_indirect (s->pt);
 		alloc_cycle (hpos, CYCLE_SPRITE);
 #ifdef DEBUGGER
 		if (debug_dma)
@@ -4675,7 +4675,7 @@ STATIC_INLINE uae_u16 sprite_fetch (struct sprite *s, int dma, int hpos, int cyc
 }
 STATIC_INLINE uae_u16 sprite_fetch2 (struct sprite *s, int hpos, int cycle, int mode)
 {
-	uae_u16 data = last_custom_value1 = chipmem_agnus_wget (s->pt);
+	uae_u16 data = last_custom_value1 = chipmem_wget_indirect (s->pt);
 	s->pt += 2;
 	return data;
 }
@@ -5380,10 +5380,10 @@ static void hsync_handler (void)
 	// DIP Agnus (8361): vblank interrupt is triggered on line 1!
 	if (currprefs.cs_dipagnus) {
 		if (vpos == 1)
-			send_interrupt (5, 1);
+			send_interrupt (5, 1 * CYCLE_UNIT);
 	} else {
 		if (vpos == 0)
-			send_interrupt (5, 1);
+			send_interrupt (5, 1 * CYCLE_UNIT);
 	}
 
 #ifdef CPUEMU_12

debug.cpp

@@ -345,13 +345,13 @@ static uae_u32 readbin (TCHAR **c)
 	return readbinx (c);
 }
 
-static TCHAR next_char(TCHAR **c)
+static TCHAR next_char (TCHAR **c)
 {
 	ignore_ws (c);
 	return *(*c)++;
 }
 
-static TCHAR peek_next_char(TCHAR **c)
+static TCHAR peek_next_char (TCHAR **c)
 {
 	TCHAR *pc = *c;
 	return pc[1];
@@ -1044,7 +1044,7 @@ static uaecptr decode_copperlist (FILE* file, uaecptr address, int nolines)
 {
 	uae_u32 insn;
 	while (nolines-- > 0) {
-		insn = (chipmem_agnus_wget (address) << 16) | chipmem_agnus_wget (address + 2);
+		insn = (chipmem_wget_indirect (address) << 16) | chipmem_wget_indirect (address + 2);
 		decode_copper_insn (file, insn, address);
 		address += 4;
 	}