serial/8250: PORT_INGENIC_JZ does not work for JZ4755

[frantony]

This commit adds JZ4780 UART support into generic 8250 driver:

commit 3939d3a65122eb40beec6aed1484c04ffc20cc27
Author: Paul Burton <paul.burton@imgtec.com>
Date:   Tue Jul 9 09:42:22 2013 +0100

    serial/8250: add support for Ingenic jz47xx UART quirks

    The UART block used in Ingenic SoCs is advertised as NS16550 compatible,
    however it isn't quite. The only difference relevant to basic usage is
    the presence of a 'UART module enable' bit in the FCR register which
    must be set at all times in order for the UART block to function. This
    patch introduces a new UART port type for Ingenic jz47xx UARTs which
    simply sets that bit.

But this "jz47xx" code does not work on JZ4755: too many characters are lost during output!

Here is my workaround for JZ4755:

--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -325,10 +325,8 @@ static const struct serial8250_config uart_config[] = {
        },
        [PORT_INGENIC_JZ] = {
                .name           = "Ingenic JZ UART",
-               .fifo_size      = 64,
-               .tx_loadsz      = 32,
-               .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
-               .flags          = UART_CAP_FIFO | UART_CAP_RTOIE,
+               .fifo_size      = 1,
+               .tx_loadsz      = 1,
        },
 };

Can we use more accurate compatible value? The ingenic,jz-uart is too generic.

[paulburton]

This should be fixed in the patches which were submitted upstream & will hopefully be merged to mainline for v3.20. The driver has separate per-SoC compatible strings, and could potentially set up the UART differently for each if needed in future: http://patchwork.linux-mips.org/patch/9057/