System calls should flush pipeline

[pavelkryukov]

@exucutional reported in: #1140 (comment)

Also I am trying to figure out where is the bug in performance simulator. Program works only with -f option.

Usually it indicates a bug in performance simulator
The different instructions are:	
Checker output: 0x1008c: {6}	addi $t1, $sp, 0	 [ $t1 = 0x1 ]
PerfSim output: 0x1008c: {6}	addi $t1, $sp, 0	 [ $t1 = 0x5 ]

The problem existed even before RISC-V implementation. The issue is that pipeline is not flushed after system-call zero time execution, so previous value of register is sticking for input system calls.

The buggy method is here. It should call set_target for system call instructions.

mipt-mips/simulator/modules/writeback/writeback.cpp

Line 59 in 375e4ed

void Writeback<ISA>::writeback_instruction_system( Writeback<ISA>::Instr* instr, Cycle cycle)

[exucutional]

This method is private. Should I write a test?

[pavelkryukov]

You must, but you cannot write a test for private method.

First of all, you should write a test that fails because of the wrong behavior. ("red stage")
Then, you fix the code so test passes and other tests are not affected. ("green stage").
Finally, you refactor and optimize code ("refactor stage").

For more details on TDD, please follow our Wiki page: https://github.com/MIPT-ILab/mipt-mips/wiki/Introduction-to-Test-Driven-Development. It's not the best manual, but you may look for lots of resources over the Internet.

For testing, there can be two approaches:

• Difficult one. You write unit tests for Writeback module from scratch: writing some instructions to input ports, reading the expected output from the output ports. It goes far beyond that issue, we even need a dedicated tracker.
• Simple one (I suggest going here). We test PerfSim as a whole system. The idea is to provide a binary input and a keyboard input which cause a error. I assume the binary input has no problem for you as it is used already (see code below), keyboard input is not so hard as well, since you may use std::istringstream as a parameter to MARSKernel class instead of std::cin.

mipt-mips/simulator/modules/core/t/unit_test.cpp

Lines 138 to 144 in 39ba2ab

	TEST_CASE( "Torture_Test: Perf_Sim, RISC-V 32 simple trace")
	{
	std::ostream nullout( nullptr);
	auto sim = create_mars_sim( "riscv32", TEST_PATH "/rv32ui-p-simple", nullout, false);
	CHECK( sim->run_no_limit() == Trap::HALT);
	CHECK( sim->get_exit_code() == 0);
	}

[pavelkryukov]

Now we can study microarchitecture in a much interactive manner! Congratulations!