Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

cpu_sim: Instructions in a packet are executed sequentially #2

Closed
mrwright opened this issue Jul 8, 2014 · 1 comment
Closed

cpu_sim: Instructions in a packet are executed sequentially #2

mrwright opened this issue Jul 8, 2014 · 1 comment
Assignees
Labels

Comments

@mrwright
Copy link
Member

mrwright commented Jul 8, 2014

Example:

{ r0 <- 0 }
{ r0 <- 1; r1 <- r0 }

(encodes as 0xc0002000, 0xe0000000, 0xe0000000, 0xe0000000, 0xc0042000, 0xd4002020, 0xe0000000, 0xe0000000)
should leave r1 with the value 0, but will leave it with the value 1.

@gwillen
Copy link
Contributor

gwillen commented Jul 8, 2014

Try now.

@gwillen gwillen closed this as completed Jul 17, 2014
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Projects
None yet
Development

No branches or pull requests

2 participants