SPP_MIPS_Compiler

The program that translates MAVN(Higher level MIPS assembler) assembly language to MIPS 32bit assembly language. All the generated files are zero-byte files.

Implementation details

• Implemented using the visitor design pattern,
  • In each phase of the compilation process new algorithm visits the symbol table that contains the relevant data.
• Special logic was implemented to allow the compiler to optimize programs so only two registers are used.
• Lexical analysis
  • Finite state machine
• Syntax analysis
  • Recursive descent
• Semantic analysis
• Liveness analysis
• Graph coloring register allocation
  • Renumber: discover live range information in the source program.
  • Build: build the interference graph.
  • Coalesce: merge the live ranges of non-interfering variables related by copy instructions.
  • Spill cost: compute the spill cost of each variable. This assesses the impact of mapping a variable to memory on the speed of the final program.
  • Simplify: construct an ordering of the nodes in the inferences graph
  • Spill Code: insert spill instructions, i.e loads and stores to commute values between registers and memory.
  • Select: assign a register to each variable.
• Assembly instructions code generation
  • All generated programs are zero-byte files
    • All the code is encoded and placed in the name of the files
    • File system sees these files as if they have zero bytes

Ilustration 1 - Phases of the compilation process.

Ilustration 2 - Graph coloring register allocation.