You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Hi, first I would like to thank the developers for this new HLS tool, it looks very simple to use and seems to have a lot of potential, so I'm excited to use it.
I'm trying to write an FPGA-based accelerator for a project, but I'm not sure how to instantiate multiple instances of a function (in hardware). Not sure if I have this right but the for loops don't seem to be unrolled into hardware. Do you have an example of how to do this?
The text was updated successfully, but these errors were encountered:
I'am afraid that loop unrolling is not implemented yet, but it should be interesting. I am going to implement it probably from next month or so.
Karuta's priority until now was to describe parallelism between threads (FSMs) and between objects (modules). Possible alternative solutions are to clone objects or to create a set of replica threads like:
@(num=4)
process f(threadIndex int) { // 4 FSMs are generated
for var i = 0; ... { ... }
}
However, this might cause some overhead by the arbitration between shared resources. So Please stay tuned for a while.
Hi, first I would like to thank the developers for this new HLS tool, it looks very simple to use and seems to have a lot of potential, so I'm excited to use it.
I'm trying to write an FPGA-based accelerator for a project, but I'm not sure how to instantiate multiple instances of a function (in hardware). Not sure if I have this right but the
for
loops don't seem to be unrolled into hardware. Do you have an example of how to do this?The text was updated successfully, but these errors were encountered: