Exception state machines

[larsbrinkhoff]

In the current implementation of the clocked CPU, the cycles for exceptions go unaccounted for. The reason is probably that an exception occurs in the space between one instruction ending, and the next beginning.

We need some kind of state machine(s) for exceptions. In a way, they should behave just like ordinary instructions.

[stefanberndtsson]

I included exception state machine ideas in my proposal in #143