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Change to jonas API
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thalesfragoso committed May 17, 2020
1 parent f080b06 commit 7c60aa9
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Showing 3 changed files with 61 additions and 69 deletions.
4 changes: 2 additions & 2 deletions examples/ecb-demo/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ This demo uses the [rtt-target](https://crates.io/crates/rtt-target) crate for c
If using `cargo-embed`, just run

```console
$ cargo embed --release --features=52832
$ cargo embed --release --features=52832 --target=thumbv7em-none-eabihf
```

Replace `52832` with the correct feature for your microcontroller.
Replace `52832` and `thumbv7em-none-eabihf` with the correct feature and target for your microcontroller.
31 changes: 13 additions & 18 deletions examples/ecb-demo/src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -17,12 +17,12 @@ use {
sync::atomic::{compiler_fence, Ordering},
},
cortex_m_rt::entry,
hal::{ecb::EcbData, Clocks, Ecb},
hal::{Clocks, Ecb},
rtt_target::{rprint, rprintln, rtt_init_print},
};

const MSG: &[u8; 16] = b"Message to encry";
const KEY: &[u8; 16] = b"aaaaaaaaaaaaaaaa";
const MSG: [u8; 16] = *b"Message to encry";
const KEY: [u8; 16] = *b"aaaaaaaaaaaaaaaa";
const CIPHER_MSG: [u8; 16] = [
0xFE, 0xF1, 0x63, 0x82, 0xB4, 0x54, 0x6B, 0xE4, 0xEB, 0x9A, 0x5C, 0x0E, 0xB6, 0x0E, 0x49, 0x2F,
];
Expand All @@ -34,26 +34,21 @@ fn main() -> ! {
let _clocks = Clocks::new(p.CLOCK).enable_ext_hfosc();
rtt_init_print!();

let data = EcbData::new(*KEY, None);
let mut ecb = Ecb::init(p.ECB, data);

let clear_text = ecb.clear_text();
*clear_text = *MSG;
rprintln!(
"Clear text: {}",
core::str::from_utf8(&clear_text[..]).unwrap(),
);
let mut ecb = Ecb::init(p.ECB);

loop {
ecb.encrypt().unwrap();
let chiper_text = ecb.cipher_text();
for number in chiper_text.iter() {
rprintln!("Starting Encryption\n");
rprintln!("Clear text: {}", core::str::from_utf8(&MSG[..]).unwrap());

let cipher_text = ecb.crypt_block(MSG, KEY).unwrap();
rprint!("Cipher Text: ");
for number in cipher_text.iter() {
rprint!("{:x} ", *number);
}
assert_eq!(*chiper_text, CIPHER_MSG);
rprintln!("\n Encryption Done\n");
assert_eq!(cipher_text, CIPHER_MSG);
rprintln!("\r\n Encryption Done\n");

cortex_m::asm::delay(68_000_000);
cortex_m::asm::delay(136_000_000);
}
}

Expand Down
95 changes: 46 additions & 49 deletions nrf-hal-common/src/ecb.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,76 +5,73 @@
use crate::target::ECB;
use core::sync::atomic::{compiler_fence, Ordering};

#[derive(Debug, Copy, Clone)]
/// Error type to represent a sharing conflict during encryption
#[derive(Debug, Copy, Clone)]
pub struct EncryptionError {}

#[repr(C)]
/// Type that represents the data structure used by the ECB module
pub struct EcbData {
key: [u8; 16],
clear_text: [u8; 16],
chiper_text: [u8; 16],
}

impl EcbData {
/// Creates the data structures needed for ECB utilization
///
/// If `clear_text` is `None` it will be initialized to zero
pub fn new(key: [u8; 16], clear_text: Option<[u8; 16]>) -> Self {
Self {
key,
clear_text: clear_text.unwrap_or_default(),
chiper_text: [0; 16],
}
}
}

/// HAL structure interface to use the capabilities of the ECB peripheral
/// A safe, blocking wrapper around the AES-ECB peripheral.
///
/// It's really just blockwise AES and not an ECB stream cipher. Blocks can be
/// encrypted by calling `crypt_block`.
pub struct Ecb {
regs: ECB,
data: EcbData,
}

impl Ecb {
/// Method for initialization
pub fn init(regs: ECB, data: EcbData) -> Self {
/// Takes ownership of the `ECB` peripheral, returning a safe wrapper.
pub fn init(regs: ECB) -> Self {
// Disable all interrupts
regs.intenclr
.write(|w| w.endecb().clear().errorecb().clear());

// NOTE(unsafe) 1 is a valid pattern to write to this register
regs.tasks_stopecb.write(|w| unsafe { w.bits(1) });
Self { regs, data }
Self { regs }
}

/// Gets a reference to the clear text memory
///
/// This is the data that will be encrypted by the encrypt method
#[inline]
pub fn clear_text(&mut self) -> &mut [u8; 16] {
&mut self.data.clear_text
}
/// Destroys `self`, giving the `ECB` peripheral back.
pub fn into_inner(self) -> ECB {
// Clear all events
self.regs.events_endecb.reset();
self.regs.events_errorecb.reset();

/// Get a reference to the cipher text memory
///
/// This will contain the encrypted data after a successful encryption
#[inline]
pub fn cipher_text(&mut self) -> &mut [u8; 16] {
&mut self.data.chiper_text
self.regs
}

/// Encrypts the data in the `clear_text` field, the encrypted data will be located in the
/// cipher text field only if this method returns `Ok`
/// Blocking encryption.
///
/// In case of an error, this method will return `Err(EncryptionError)`, in this case, the data
/// in `cipher_text` is not valid
pub fn encrypt(&mut self) -> Result<(), EncryptionError> {
// Ecb data is repr(C) and has no padding
let data_ptr = &mut self.data as *mut _ as u32;
/// Encrypts a `block` with `key`.
///
/// # Errors
///
/// An error will be returned when the AES hardware raises an `ERRORECB`
/// event. This can happen when an operation is started that shares the AES
/// hardware resources with the AES ECB peripheral while an encryption
/// operation is running.
pub fn crypt_block(
&mut self,
block: [u8; 16],
key: [u8; 16],
) -> Result<[u8; 16], EncryptionError> {
#[repr(C)]
struct EcbData {
key: [u8; 16],
clear_text: [u8; 16],
cipher_text: [u8; 16],
}

// We allocate the DMA'd buffer on the stack, which means that we must
// not panic or return before the AES operation is finished.
let mut buf = EcbData {
key,
clear_text: block,
cipher_text: [0; 16],
};

// NOTE(unsafe) Any 32bits pattern is safe to write to this register
self.regs.ecbdataptr.write(|w| unsafe { w.bits(data_ptr) });
self.regs
.ecbdataptr
.write(|w| unsafe { w.bits(&mut buf as *mut _ as u32) });

// Clear all events
self.regs.events_endecb.reset();
Expand All @@ -96,6 +93,6 @@ impl Ecb {
// It's ok to return here, the events will be cleared before the next encryption
return Err(EncryptionError {});
}
Ok(())
Ok(buf.cipher_text)
}
}

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