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Don't Merge: Initial working commit of an async uarte #40
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…PSC. Won't build because it relies on some hacked up repos I needed to get it working, but worth sharing anyway.
Note: This branch uses (essentially) the |
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I left some comments in response to your question in #11. This is not a full review.
By the way, how familiar are you with Jorge's article about DMA? I don't recall enough of the details to know whether it will be helpful here, but I've immersed myself in it in the past and believe it is a good approach. (For reference, here's my own partial implementation.)
I'm not terribly familiar, unfortunately. This is approaching the problem in a different way though (I think), leaning less heavily on futures style abstractions, and rather being a more straightforward "stream" implementation. I think it could definitely be possible to impl To be honest, I'm open to having multiple parallel versions of each peripheral, perhaps abstracting some of the common behavior to a central |
nrf52-hal-common/src/uarte_async.rs
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/// Return the raw interface to the underlying UARTE peripheral | ||
pub fn free(self) -> T { | ||
self.periph |
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I should probably disable interrupts and close any open DMA transactions here, and we should maybe disable the UARTE peripheral before giving it back.
nrf52-hal-common/src/uarte_async.rs
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} | ||
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pub struct Pins { |
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Stuff like this should probably move to a shared mod.rs
between uarte.rs
and uarte_async.rs
.
nrf52-hal-common/src/uarte_async.rs
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use crate::uarte_async::DmaState::*; | ||
let mut stat = Idle; | ||
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::core::mem::swap(&mut stat, &mut DMA_STATUS); |
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I should add a note here that this is "safe" to do, since we are in interrupt condition, and I don't think it is possible for interrupts to be re-entrant.
nrf52-hal-common/src/uarte_async.rs
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Err(_) => panic!("queue error"), | ||
}; | ||
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let sz = min(255, rgrant.buf.len()); |
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This should not be 255, but instead something that makes sense for both the 832 and 840
nrf52-hal-common/src/uarte_async.rs
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// Set up the DMA write | ||
uart.txd.ptr.write(|w| | ||
// We're giving the register a pointer to the stack. Since we're |
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Comments are no longer true
Thanks for the explanation. I agree that parallel approaches are probably the right way to go at this point. Maybe one approach will "win" and we can deprecate some or all of the others in time, but right now too much is in flux, I think. Rust's async story is still developing and it's not clear to me how that will affect nb/embedded-hal and HALs in general. |
This branch is using (a hacked up version of)
bbqueue
to act as a SPSC.Won't build because it relies on some hacked up repos I needed to get it working, but worth sharing anyway.
Edit: This is now based on the released 0.2.1 version of BBQueue.