Verilator support (#28)

* refs #27
* circleci runs verilator

.circleci/config.yml

@@ -16,13 +16,13 @@ jobs:
           name: Install dependencies
           command: |
             sudo apt-get update
-            sudo apt-get install -y pandoc
-            sudo apt-get install ghdl gtkwave
+            sudo apt-get install -y pandoc ghdl gtkwave verilator
             sudo pip install -e .
 
       - run: python --version
       - run: make gen
       - run: make compile_ghdl
+      - run: make compile_verilator
 
   test-2.7:
     <<: *test-template

.gitignore

@@ -31,3 +31,6 @@ example.docx
 # virtual env
 venv
 .venv
+
+source_me
+obj_dir/

Makefile

@@ -50,6 +50,11 @@ compile_ghdl:
 	ghdl -e vhd_dut
 	ghdl -r vhd_dut
 
+compile_verilator:
+	verilator --cc example/output/example_sv_pkg.sv
+	verilator --cc example/output_default/example_sv_pkg.sv
+	verilator --cc example/output_no_default/example_sv_pkg.sv
+
 compile_icarus:
 	iverilog -g2012 -o foo example/output/*.sv
 
@@ -75,3 +80,7 @@ clean:
 validate:
 	xmllint --noout --schema ipxact2systemverilog/xml/component.xsd  example/input/test.xml
 
+
+venv: requirements.txt
+	python3 -m venv ./venv
+	venv/bin/pip install --upgrade -r requirements.txt

README.rst

@@ -86,10 +86,8 @@ Working in development mode for pypi
 
 TODO
 ====
-* Should compile the verilog output with http://iverilog.icarus.com/ but sadly icarus does not support enough SV yet 
 * A better testbench for the generated packages should be implemented.
 * More complicated IPXACT files should be added and tried out.
 * Add support for the SystemVerilog generator to have a register field of an enumerated type.
-* Use http://pyxb.sourceforge.net to enable dumping out the modified XML
 * Support DIM