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8274795: AArch64: avoid spilling and restoring r18 in macro assembler #28

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20 changes: 9 additions & 11 deletions src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2027,15 +2027,6 @@ void MacroAssembler::increment(Address dst, int value)
str(rscratch1, dst);
}


void MacroAssembler::pusha() {
push(0x7fffffff, sp);
}

void MacroAssembler::popa() {
pop(0x7fffffff, sp);
}

// Push lots of registers in the bit set supplied. Don't push sp.
// Return the number of words pushed
int MacroAssembler::push(unsigned int bitset, Register stack) {
Expand Down Expand Up @@ -2677,7 +2668,7 @@ void MacroAssembler::pop_call_clobbered_registers_except(RegSet exclude) {

void MacroAssembler::push_CPU_state(bool save_vectors, bool use_sve,
int sve_vector_size_in_bytes) {
push(0x3fffffff, sp); // integer registers except lr & sp
push(RegSet::range(r0, r29), sp); // integer registers except lr & sp
if (save_vectors && use_sve && sve_vector_size_in_bytes > 16) {
sub(sp, sp, sve_vector_size_in_bytes * FloatRegisterImpl::number_of_registers);
for (int i = 0; i < FloatRegisterImpl::number_of_registers; i++) {
Expand Down Expand Up @@ -2713,7 +2704,14 @@ void MacroAssembler::pop_CPU_state(bool restore_vectors, bool use_sve,
reinitialize_ptrue();
}

pop(0x3fffffff, sp); // integer registers except lr & sp
// integer registers except lr & sp
pop(RegSet::range(r0, r17), sp);
#ifdef R18_RESERVED
ldp(zr, r19, Address(post(sp, 2 * wordSize)));
pop(RegSet::range(r20, r29), sp);
#else
pop(RegSet::range(r18_tls, r29), sp);
#endif
}

/**
Expand Down
4 changes: 0 additions & 4 deletions src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -1123,10 +1123,6 @@ class MacroAssembler: public Assembler {
void push(Register src);
void pop(Register dst);

// push all registers onto the stack
void pusha();
void popa();

void repne_scan(Register addr, Register value, Register count,
Register scratch);
void repne_scanw(Register addr, Register value, Register count,
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -1397,11 +1397,12 @@ address TemplateInterpreterGenerator::generate_native_entry(bool synchronized) {
__ cmp(rscratch1, (u1)StackOverflow::stack_guard_yellow_reserved_disabled);
__ br(Assembler::NE, no_reguard);

__ pusha(); // XXX only save smashed registers
__ push_call_clobbered_registers();
__ mov(c_rarg0, rthread);
__ mov(rscratch2, CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
__ blr(rscratch2);
__ popa(); // XXX only restore smashed registers
__ pop_call_clobbered_registers();

__ bind(no_reguard);
}

Expand Down