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Fix gcc prefix and update libopencm3. (#2922)
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* Fix gcc prefix and update libopencm3.

See:
libopencm3/libopencm3@7be50a5
libopencm3/libopencm3@034dbf2

* update luftboot
* Update linker scripts.
* Update deprecated function.
* Update rcc_clock_scale structure.
* Add compatibility defines.
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@Fabien-B
Fabien-B committed Jan 25, 2023
1 parent c08a472 commit f60c68c
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Showing 28 changed files with 86 additions and 74 deletions.
24 changes: 12 additions & 12 deletions conf/Makefile.arm-embedded-toolchain
View file
Expand Up @@ -7,25 +7,25 @@
# This is the common Makefile for finding the arm compiler
# for bare metal systems like on the ARM7TDMI, cortex M3/4

PREFIX ?= arm-none-eabi
PREFIX ?= arm-none-eabi-

ifeq ($(shell which $(PREFIX)-gcc),)
ifeq ($(shell which $(PREFIX)gcc),)
ifneq ($(MAKECMDGOALS),clean)
$(warning Warning: arm-none-eabi-gcc cross-compiler not found! Some tools might not be able to build correctly)
endif
endif

CC = $(PREFIX)-gcc
CXX = $(PREFIX)-g++
LD = $(PREFIX)-g++
AR = $(PREFIX)-ar
CP = $(PREFIX)-objcopy
DMP = $(PREFIX)-objdump
NM = $(PREFIX)-nm
SIZE = $(PREFIX)-size
STRIP = $(PREFIX)-strip
CC = $(PREFIX)gcc
CXX = $(PREFIX)g++
LD = $(PREFIX)g++
AR = $(PREFIX)ar
CP = $(PREFIX)objcopy
DMP = $(PREFIX)objdump
NM = $(PREFIX)nm
SIZE = $(PREFIX)size
STRIP = $(PREFIX)strip

GDB = $(shell which $(PREFIX)-gdb)
GDB = $(shell which $(PREFIX)gdb)
ifeq ($(GDB),)
GDB = $(shell which gdb-multiarch)
endif
Expand Down
30 changes: 15 additions & 15 deletions conf/Makefile.arm-linux-toolchain
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Expand Up @@ -9,15 +9,15 @@
# If HARD_FLOAT is defined try to find armhf cross compiler, otherwise default to softfloat

ifdef HARD_FLOAT
PREFIX ?= arm-linux-gnueabihf
PREFIX ?= arm-linux-gnueabihf-
else
PREFIX ?= arm-linux-gnueabi
PREFIX ?= arm-linux-gnueabi-
endif

#
# if gcc can't be found in path, try the codesourcery toolchain in /usr/local/codesourcery
#
ifeq ($(shell which $(PREFIX)-gcc),)
ifeq ($(shell which $(PREFIX)gcc),)
ifndef HARD_FLOAT
TOOLCHAIN=$(shell find -L /usr/local/codesourcery -maxdepth 2 -type d -name arm-none-linux-gnueabi 2>/dev/null | head -n 1)
ifneq ($(TOOLCHAIN),)
Expand All @@ -27,7 +27,7 @@ endif
endif

# if toolchain could not be found, print some useful info
ifeq ($(shell which $(PREFIX)-gcc),)
ifeq ($(shell which $(PREFIX)gcc),)
# no suitable toolchain found...
ifdef HARD_FLOAT
$(error Error: arm-linux-gnueabihf-gcc cross-compiler not found! Please install the gcc-arm-linux-gnueabihf package.)
Expand All @@ -36,17 +36,17 @@ ifeq ($(shell which $(PREFIX)-gcc),)
endif
endif

CC = $(PREFIX)-gcc
CXX = $(PREFIX)-g++
LD = $(PREFIX)-g++
AR = $(PREFIX)-ar
CP = $(PREFIX)-objcopy
DMP = $(PREFIX)-objdump
NM = $(PREFIX)-nm
SIZE = $(PREFIX)-size
STRIP = $(PREFIX)-strip

GDB = $(shell which $(PREFIX)-gdb)
CC = $(PREFIX)gcc
CXX = $(PREFIX)g++
LD = $(PREFIX)g++
AR = $(PREFIX)ar
CP = $(PREFIX)objcopy
DMP = $(PREFIX)objdump
NM = $(PREFIX)nm
SIZE = $(PREFIX)size
STRIP = $(PREFIX)strip

GDB = $(shell which $(PREFIX)gdb)
ifeq ($(GDB),)
GDB = $(shell which gdb-multiarch)
endif
Expand Down
3 changes: 1 addition & 2 deletions sw/airborne/arch/stm32/apogee.ld
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Expand Up @@ -31,5 +31,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f4.ld

INCLUDE cortex-m-generic.ld
3 changes: 2 additions & 1 deletion sw/airborne/arch/stm32/cc3d.ld
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Expand Up @@ -32,4 +32,5 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f1.ld
INCLUDE cortex-m-generic.ld

2 changes: 1 addition & 1 deletion sw/airborne/arch/stm32/cjmcu.ld
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Expand Up @@ -32,4 +32,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f1.ld
INCLUDE cortex-m-generic.ld
3 changes: 1 addition & 2 deletions sw/airborne/arch/stm32/crazybee_f4_1.0.ld
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Expand Up @@ -34,5 +34,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f4.ld
/* INCLUDE cortex-m-generic.ld */
INCLUDE cortex-m-generic.ld
3 changes: 2 additions & 1 deletion sw/airborne/arch/stm32/elle0.ld
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Expand Up @@ -32,4 +32,5 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f4.ld
INCLUDE cortex-m-generic.ld

2 changes: 1 addition & 1 deletion sw/airborne/arch/stm32/krooz.ld
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Expand Up @@ -33,4 +33,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f4.ld
INCLUDE cortex-m-generic.ld
2 changes: 1 addition & 1 deletion sw/airborne/arch/stm32/lisa-l.ld
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Expand Up @@ -32,4 +32,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f1.ld
INCLUDE cortex-m-generic.ld
3 changes: 1 addition & 2 deletions sw/airborne/arch/stm32/lisa-m.ld
View file
Expand Up @@ -32,5 +32,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f1.ld

INCLUDE cortex-m-generic.ld
2 changes: 1 addition & 1 deletion sw/airborne/arch/stm32/lisa-mx.ld
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Expand Up @@ -32,4 +32,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f4.ld
INCLUDE cortex-m-generic.ld
3 changes: 1 addition & 2 deletions sw/airborne/arch/stm32/lisa-s.ld
View file
Expand Up @@ -32,5 +32,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f1.ld

INCLUDE cortex-m-generic.ld
22 changes: 11 additions & 11 deletions sw/airborne/arch/stm32/mcu_arch.c
View file
Expand Up @@ -52,7 +52,7 @@ const struct rcc_clock_scale rcc_hse_24mhz_3v3[RCC_CLOCK_3V3_END] = {
.hpre = RCC_CFGR_HPRE_DIV_NONE,
.ppre1 = RCC_CFGR_PPRE_DIV_4,
.ppre2 = RCC_CFGR_PPRE_DIV_2,
.power_save = 1,
.voltage_scale = PWR_SCALE1,
.flash_config = FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_3WS,
.ahb_frequency = 48000000,
.apb1_frequency = 12000000,
Expand All @@ -66,7 +66,7 @@ const struct rcc_clock_scale rcc_hse_24mhz_3v3[RCC_CLOCK_3V3_END] = {
.hpre = RCC_CFGR_HPRE_DIV_NONE,
.ppre1 = RCC_CFGR_PPRE_DIV_2,
.ppre2 = RCC_CFGR_PPRE_DIV_NONE,
.power_save = 1,
.voltage_scale = PWR_SCALE1,
.flash_config = FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_2WS,
.ahb_frequency = 84000000,
.apb1_frequency = 42000000,
Expand All @@ -80,7 +80,7 @@ const struct rcc_clock_scale rcc_hse_24mhz_3v3[RCC_CLOCK_3V3_END] = {
.hpre = RCC_CFGR_HPRE_DIV_NONE,
.ppre1 = RCC_CFGR_PPRE_DIV_4,
.ppre2 = RCC_CFGR_PPRE_DIV_2,
.power_save = 1,
.voltage_scale = PWR_SCALE1,
.flash_config = FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_3WS,
.ahb_frequency = 120000000,
.apb1_frequency = 30000000,
Expand Down Expand Up @@ -227,40 +227,40 @@ void mcu_arch_init(void)
#if EXT_CLK == 8000000
#if defined(STM32F1)
PRINT_CONFIG_MSG("Using 8MHz external clock to PLL it to 72MHz.")
rcc_clock_setup_in_hse_8mhz_out_72mhz();
rcc_clock_setup_pll(&rcc_hse_configs[RCC_CLOCK_HSE8_72MHZ])
#elif defined(STM32F4)
#if AHB_CLK == 84000000
PRINT_CONFIG_MSG("Using 8MHz external clock to PLL it to 84MHz.")
rcc_clock_setup_hse_3v3(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_84MHZ]);
rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_84MHZ]);
#else
PRINT_CONFIG_MSG("Using 8MHz external clock to PLL it to 168MHz.")
rcc_clock_setup_hse_3v3(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
#endif
#endif
#elif EXT_CLK == 12000000
#if defined(STM32F1)
PRINT_CONFIG_MSG("Using 12MHz external clock to PLL it to 72MHz.")
rcc_clock_setup_in_hse_12mhz_out_72mhz();
rcc_clock_setup_pll(&rcc_hse_configs[RCC_CLOCK_HSE12_72MHZ]);
#elif defined(STM32F4)
PRINT_CONFIG_MSG("Using 12MHz external clock to PLL it to 168MHz.")
rcc_clock_setup_hse_3v3(&rcc_hse_12mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
rcc_clock_setup_pll(&rcc_hse_12mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
#endif
#elif EXT_CLK == 16000000
#if defined(STM32F4)
PRINT_CONFIG_MSG("Using 16MHz external clock to PLL it to 168MHz.")
rcc_clock_setup_hse_3v3(&rcc_hse_16mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
rcc_clock_setup_pll(&rcc_hse_16mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
#endif
#elif EXT_CLK == 24000000
#if defined(STM32F4)
PRINT_CONFIG_MSG("Using 24MHz external clock to PLL it to 168MHz.")
rcc_clock_setup_hse_3v3(&rcc_hse_24mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
rcc_clock_setup_pll(&rcc_hse_24mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
#elif defined(STM32F1)
rcc_clock_setup_in_hse_24mhz_out_24mhz_pprz();
#endif
#elif EXT_CLK == 25000000
#if defined(STM32F4)
PRINT_CONFIG_MSG("Using 25MHz external clock to PLL it to 168MHz.")
rcc_clock_setup_hse_3v3(&rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
rcc_clock_setup_pll(&rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
#endif
#else
#error EXT_CLK is either set to an unsupported frequency or not defined at all. Please check!
Expand Down
8 changes: 7 additions & 1 deletion sw/airborne/arch/stm32/mcu_periph/adc_arch.c
View file
Expand Up @@ -132,6 +132,10 @@
#endif
#endif

#define RST_ADC1 RST_ADC
#define RST_ADC2 RST_ADC
#define RST_ADC3 RST_ADC

#else // !STM32F4
// ADC 3 not supported on STM32F1
#undef USE_AD3
Expand Down Expand Up @@ -435,16 +439,18 @@ static inline void adc_init_rcc(void)
/* Enable ADC peripheral clocks. */
#if USE_AD1
rcc_periph_clock_enable(RCC_ADC1);
rcc_periph_reset_pulse(RST_ADC1);
#endif
#if USE_AD2
rcc_periph_clock_enable(RCC_ADC2);
rcc_periph_reset_pulse(RST_ADC2);
#endif
#if USE_AD3
rcc_periph_clock_enable(RCC_ADC3);
rcc_periph_reset_pulse(RST_ADC3);
#endif

/* Time Base configuration */
timer_reset(TIM_ADC);
timer_set_mode(TIM_ADC, TIM_CR1_CKD_CK_INT,
TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
/* timer counts with ADC_TIMER_FREQUENCY */
Expand Down
4 changes: 2 additions & 2 deletions sw/airborne/arch/stm32/mcu_periph/i2c_arch.c
View file
Expand Up @@ -1134,9 +1134,9 @@ static void i2c_stm32_setbitrate(struct i2c_periph *periph, int bitrate)

// 1)
#ifdef STM32F1
i2c_set_clock_frequency(i2c, I2C_CR2_FREQ_36MHZ);
i2c_set_clock_frequency(i2c, 36);
#else // STM32F4
i2c_set_clock_frequency(i2c, I2C_CR2_FREQ_42MHZ);
i2c_set_clock_frequency(i2c, 42);
#endif
// 2)
//i2c_set_fast_mode(i2c);
Expand Down
3 changes: 2 additions & 1 deletion sw/airborne/arch/stm32/modules/actuators/actuators_shared_arch.c
View file
Expand Up @@ -59,7 +59,8 @@ void actuators_pwm_arch_channel_init(uint32_t timer_peripheral,
void set_servo_timer(uint32_t timer, uint32_t freq, uint8_t channels_mask)
{
// WARNING, this reset is only implemented for TIM1-8 in libopencm3!!
timer_reset(timer);

//FIXME removed deprecated timer_reset(timer), should it be replaced by rcc_periph_reset_pulse(RST_TIMx) ?

/* Timer global mode:
* - No divider.
Expand Down
10 changes: 9 additions & 1 deletion sw/airborne/arch/stm32/modules/radio_control/ppm_arch.c
View file
Expand Up @@ -61,48 +61,56 @@ static uint32_t timer_rollover_cnt;
PRINT_CONFIG_MSG("Using TIM1 for PPM input.")
#define PPM_TIMER TIM1
#define RCC_TIM_PPM RCC_TIM1
#define RST_TIM_PPM RST_TIM1

#elif USE_PPM_TIM2

PRINT_CONFIG_MSG("Using TIM2 for PPM input.")
#define PPM_TIMER TIM2
#define RCC_TIM_PPM RCC_TIM2
#define RST_TIM_PPM RST_TIM2

#elif USE_PPM_TIM3

PRINT_CONFIG_MSG("Using TIM3 for PPM input.")
#define PPM_TIMER TIM3
#define RCC_TIM_PPM RCC_TIM3
#define RST_TIM_PPM RST_TIM3

#elif USE_PPM_TIM4

PRINT_CONFIG_MSG("Using TIM4 for PPM input.")
#define PPM_TIMER TIM4
#define RCC_TIM_PPM RCC_TIM4
#define RST_TIM_PPM RST_TIM4

#elif USE_PPM_TIM5

PRINT_CONFIG_MSG("Using TIM5 for PPM input.")
#define PPM_TIMER TIM5
#define RCC_TIM_PPM RCC_TIM5
#define RST_TIM_PPM RST_TIM5

#elif USE_PPM_TIM8

PRINT_CONFIG_MSG("Using TIM8 for PPM input.")
#define PPM_TIMER TIM8
#define RCC_TIM_PPM RCC_TIM8
#define RST_TIM_PPM RST_TIM8

#elif USE_PPM_TIM9

PRINT_CONFIG_MSG("Using TIM9 for PPM input.")
#define PPM_TIMER TIM9
#define RCC_TIM_PPM RCC_TIM9
#define RST_TIM_PPM RST_TIM9

#elif USE_PPM_TIM12

PRINT_CONFIG_MSG("Using TIM12 for PPM input.")
#define PPM_TIMER TIM12
#define RCC_TIM_PPM RCC_TIM12
#define RST_TIM_PPM RST_TIM12

#else
#error Unknown PPM input timer configuration.
Expand All @@ -117,7 +125,7 @@ void ppm_arch_init(void)
gpio_setup_pin_af(PPM_GPIO_PORT, PPM_GPIO_PIN, PPM_GPIO_AF, FALSE);

/* Time Base configuration */
timer_reset(PPM_TIMER);
rcc_periph_reset_pulse(RST_TIM_PPM);
timer_set_mode(PPM_TIMER, TIM_CR1_CKD_CK_INT,
TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
timer_set_period(PPM_TIMER, 0xFFFF);
Expand Down
2 changes: 1 addition & 1 deletion sw/airborne/arch/stm32/navstik.ld
View file
Expand Up @@ -33,4 +33,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f4.ld
INCLUDE cortex-m-generic.ld
2 changes: 1 addition & 1 deletion sw/airborne/arch/stm32/naze32.ld
View file
Expand Up @@ -32,4 +32,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f1.ld
INCLUDE cortex-m-generic.ld
2 changes: 1 addition & 1 deletion sw/airborne/arch/stm32/openpilot_revo.ld
View file
Expand Up @@ -32,4 +32,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f4.ld
INCLUDE cortex-m-generic.ld
2 changes: 1 addition & 1 deletion sw/airborne/arch/stm32/openpilot_revo_nano.ld
View file
Expand Up @@ -32,4 +32,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f4.ld
INCLUDE cortex-m-generic.ld
2 changes: 1 addition & 1 deletion sw/airborne/arch/stm32/px4fmu_2.4.ld
View file
Expand Up @@ -30,4 +30,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f4.ld
INCLUDE cortex-m-generic.ld
2 changes: 1 addition & 1 deletion sw/airborne/arch/stm32/px4fmu_4.0.ld
View file
Expand Up @@ -31,4 +31,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f4.ld
INCLUDE cortex-m-generic.ld
3 changes: 1 addition & 2 deletions sw/airborne/arch/stm32/px4io_2.4.ld
View file
Expand Up @@ -32,5 +32,4 @@ MEMORY
}

/* Include the common ld script. */
INCLUDE libopencm3_stm32f1.ld

INCLUDE cortex-m-generic.ld

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