porojanmadalin / ATM_Machine Public

Notifications You must be signed in to change notification settings
Fork 0
Star 0

A FPGA automated teller machine made for the Basys3.

0 stars 0 forks Branches Tags Activity

Notifications

Name		Name	Last commit message	Last commit date
Latest commit History 6 Commits
LOGISIM		LOGISIM
SRC		SRC
ATM.pdf		ATM.pdf
ATM_BANCAR_BITSTREAM.bit		ATM_BANCAR_BITSTREAM.bit
README.md		README.md

Repository files navigation

ATM Machine

A simple ATM Machine with withdraw, deposit and transfers between different bank accounts.

Built with

VHDL
VIVADO
LOGISIM

Author

Madalin Marian Porojan

About

A FPGA automated teller machine made for the Basys3.

fpga vhdl atm basys3

Report repository

Releases

No releases published

Packages

No packages published

Languages

VHDL 100.0%