v0.2.0

0.2.0 - 2023-08-03

Changed

• Make pending bits standalone 32-bit registers to conform with ACLINT spec.
• Switch to Chipsalliance's Verible linting action.

v0.1.0

0.1.0 - 2022-08-29

Changed

• Update to IP variant from Snitch repository which uses register_interface.

Added

• Add basic testbench.
• Add CI.
• Add make fragment for easy reconfiguration.