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pulp-platform

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  1. This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

    SystemVerilog 127 66

  2. This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

    SystemVerilog 132 39

  3. RISC-V manycore accelerator for HERO, bigPULP hardware platform

    SystemVerilog 36 13

  4. A deep learning-powered visual navigation engine to enables autonomous navigation of pocket-size quadrotor - running on PULP

    C 351 122

  5. AXI4 and AXI4-Lite synthesizable modules and verification infrastructure

    SystemVerilog 175 55

  6. Common SV components

    SystemVerilog 60 39

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