Pinned repositories

  1. pulpissimo

    This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

    SystemVerilog 55 16

  2. ariane

    Ariane is a 6-stage RISC-V CPU

    SystemVerilog 327 43

  3. pulp

    This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

    SystemVerilog 37 11

  4. pulpino

    An open-source microcontroller system based on RISC-V

    C 486 135

  5. riscv

    RISCY is an in-order 4-stage RISC-V RV32IMFCXpulp CPU

    SystemVerilog 129 65

  6. bigpulp

    RISC-V manycore accelerator for HERO, bigPULP hardware platform

    SystemVerilog 5 2