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sysbus: Drop sysbus_from_qdev() cast macro
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Replace by SYS_BUS_DEVICE() QOM cast macro using a scripted conversion.
Avoids the old macro creeping into new code.

Resolve a Coding Style warning in openpic code.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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@afaerber
afaerber authored and Anthony Liguori committed Jan 21, 2013
1 parent 6fd8e79 commit 1356b98
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Showing 76 changed files with 214 additions and 215 deletions.
2 changes: 1 addition & 1 deletion hw/a15mpcore.c
View file
Expand Up @@ -46,7 +46,7 @@ static int a15mp_priv_init(SysBusDevice *dev)
qdev_prop_set_uint32(s->gic, "num-irq", s->num_irq);
qdev_prop_set_uint32(s->gic, "revision", 2);
qdev_init_nofail(s->gic);
busdev = sysbus_from_qdev(s->gic);
busdev = SYS_BUS_DEVICE(s->gic);

/* Pass through outbound IRQ lines from the GIC */
sysbus_pass_irq(dev, busdev);
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6 changes: 3 additions & 3 deletions hw/a9mpcore.c
View file
Expand Up @@ -112,7 +112,7 @@ static const MemoryRegionOps a9_scu_ops = {

static void a9mp_priv_reset(DeviceState *dev)
{
a9mp_priv_state *s = FROM_SYSBUS(a9mp_priv_state, sysbus_from_qdev(dev));
a9mp_priv_state *s = FROM_SYSBUS(a9mp_priv_state, SYS_BUS_DEVICE(dev));
int i;
s->scu_control = 0;
for (i = 0; i < ARRAY_SIZE(s->old_timer_status); i++) {
Expand All @@ -136,7 +136,7 @@ static int a9mp_priv_init(SysBusDevice *dev)
qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu);
qdev_prop_set_uint32(s->gic, "num-irq", s->num_irq);
qdev_init_nofail(s->gic);
gicbusdev = sysbus_from_qdev(s->gic);
gicbusdev = SYS_BUS_DEVICE(s->gic);

/* Pass through outbound IRQ lines from the GIC */
sysbus_pass_irq(dev, gicbusdev);
Expand All @@ -147,7 +147,7 @@ static int a9mp_priv_init(SysBusDevice *dev)
s->mptimer = qdev_create(NULL, "arm_mptimer");
qdev_prop_set_uint32(s->mptimer, "num-cpu", s->num_cpu);
qdev_init_nofail(s->mptimer);
busdev = sysbus_from_qdev(s->mptimer);
busdev = SYS_BUS_DEVICE(s->mptimer);

/* Memory map (addresses are offsets from PERIPHBASE):
* 0x0000-0x00ff -- Snoop Control Unit
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2 changes: 1 addition & 1 deletion hw/apb_pci.c
View file
Expand Up @@ -365,7 +365,7 @@ PCIBus *pci_apb_init(hwaddr special_base,
/* Ultrasparc PBM main bus */
dev = qdev_create(NULL, "pbm");
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
s = SYS_BUS_DEVICE(dev);
/* apb_config */
sysbus_mmio_map(s, 0, special_base);
/* PCI configuration space */
Expand Down
8 changes: 4 additions & 4 deletions hw/arm11mpcore.c
View file
Expand Up @@ -83,8 +83,8 @@ static void mpcore_priv_set_irq(void *opaque, int irq, int level)
static void mpcore_priv_map_setup(mpcore_priv_state *s)
{
int i;
SysBusDevice *gicbusdev = sysbus_from_qdev(s->gic);
SysBusDevice *busdev = sysbus_from_qdev(s->mptimer);
SysBusDevice *gicbusdev = SYS_BUS_DEVICE(s->gic);
SysBusDevice *busdev = SYS_BUS_DEVICE(s->mptimer);
memory_region_init(&s->container, "mpcode-priv-container", 0x2000);
memory_region_init_io(&s->iomem, &mpcore_scu_ops, s, "mpcore-scu", 0x100);
memory_region_add_subregion(&s->container, 0, &s->iomem);
Expand Down Expand Up @@ -131,7 +131,7 @@ static int mpcore_priv_init(SysBusDevice *dev)
qdev_init_nofail(s->gic);

/* Pass through outbound IRQ lines from the GIC */
sysbus_pass_irq(dev, sysbus_from_qdev(s->gic));
sysbus_pass_irq(dev, SYS_BUS_DEVICE(s->gic));

/* Pass through inbound GPIO lines to the GIC */
qdev_init_gpio_in(&s->busdev.qdev, mpcore_priv_set_irq, s->num_irq - 32);
Expand Down Expand Up @@ -190,7 +190,7 @@ static int realview_mpcore_init(SysBusDevice *dev)
priv = qdev_create(NULL, "arm11mpcore_priv");
qdev_prop_set_uint32(priv, "num-cpu", s->num_cpu);
qdev_init_nofail(priv);
s->priv = sysbus_from_qdev(priv);
s->priv = SYS_BUS_DEVICE(priv);
sysbus_pass_irq(dev, s->priv);
for (i = 0; i < 32; i++) {
s->cpuic[i] = qdev_get_gpio_in(priv, i);
Expand Down
2 changes: 1 addition & 1 deletion hw/arm_gic_common.c
View file
Expand Up @@ -123,7 +123,7 @@ static int arm_gic_common_init(SysBusDevice *dev)

static void arm_gic_common_reset(DeviceState *dev)
{
GICState *s = FROM_SYSBUS(GICState, sysbus_from_qdev(dev));
GICState *s = FROM_SYSBUS(GICState, SYS_BUS_DEVICE(dev));
int i;
memset(s->irq_state, 0, GIC_MAXIRQ * sizeof(gic_irq_state));
for (i = 0 ; i < s->num_cpu; i++) {
Expand Down
2 changes: 1 addition & 1 deletion hw/arm_mptimer.c
View file
Expand Up @@ -238,7 +238,7 @@ static void timerblock_reset(timerblock *tb)
static void arm_mptimer_reset(DeviceState *dev)
{
arm_mptimer_state *s =
FROM_SYSBUS(arm_mptimer_state, sysbus_from_qdev(dev));
FROM_SYSBUS(arm_mptimer_state, SYS_BUS_DEVICE(dev));
int i;
/* We reset every timer in the array, not just the ones we're using,
* because vmsave will look at every array element.
Expand Down
2 changes: 1 addition & 1 deletion hw/arm_sysctl.c
View file
Expand Up @@ -75,7 +75,7 @@ static int board_id(arm_sysctl_state *s)

static void arm_sysctl_reset(DeviceState *d)
{
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, sysbus_from_qdev(d));
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, SYS_BUS_DEVICE(d));

s->leds = 0;
s->lockval = 0;
Expand Down
6 changes: 3 additions & 3 deletions hw/armv7m.c
View file
Expand Up @@ -137,12 +137,12 @@ static void armv7m_bitband_init(void)
dev = qdev_create(NULL, "ARM,bitband-memory");
qdev_prop_set_uint32(dev, "base", 0x20000000);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x22000000);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x22000000);

dev = qdev_create(NULL, "ARM,bitband-memory");
qdev_prop_set_uint32(dev, "base", 0x40000000);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x42000000);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x42000000);
}

/* Board init. */
Expand Down Expand Up @@ -216,7 +216,7 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
env->nvic = nvic;
qdev_init_nofail(nvic);
cpu_pic = arm_pic_init_cpu(cpu);
sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
sysbus_connect_irq(SYS_BUS_DEVICE(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
for (i = 0; i < 64; i++) {
pic[i] = qdev_get_gpio_in(nvic, i);
}
Expand Down
2 changes: 1 addition & 1 deletion hw/axis_dev88.c
View file
Expand Up @@ -300,7 +300,7 @@ void axisdev88_init(QEMUMachineInitArgs *args)
/* FIXME: Is there a proper way to signal vectors to the CPU core? */
qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, 0x3001c000);
sysbus_connect_irq(s, 0, cpu_irq[0]);
sysbus_connect_irq(s, 1, cpu_irq[1]);
Expand Down
2 changes: 1 addition & 1 deletion hw/cadence_gem.c
View file
Expand Up @@ -959,7 +959,7 @@ static void gem_phy_reset(GemState *s)

static void gem_reset(DeviceState *d)
{
GemState *s = FROM_SYSBUS(GemState, sysbus_from_qdev(d));
GemState *s = FROM_SYSBUS(GemState, SYS_BUS_DEVICE(d));

DB_PRINT("\n");

Expand Down
2 changes: 1 addition & 1 deletion hw/empty_slot.c
View file
Expand Up @@ -56,7 +56,7 @@ void empty_slot_init(hwaddr addr, uint64_t slot_size)
EmptySlot *e;

dev = qdev_create(NULL, "empty_slot");
s = sysbus_from_qdev(dev);
s = SYS_BUS_DEVICE(dev);
e = FROM_SYSBUS(EmptySlot, s);
e->size = slot_size;

Expand Down
4 changes: 2 additions & 2 deletions hw/escc.c
View file
Expand Up @@ -700,7 +700,7 @@ MemoryRegion *escc_init(hwaddr base, qemu_irq irqA, qemu_irq irqB,
qdev_prop_set_uint32(dev, "chnBtype", ser);
qdev_prop_set_uint32(dev, "chnAtype", ser);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(s, 0, irqB);
sysbus_connect_irq(s, 1, irqA);
if (base) {
Expand Down Expand Up @@ -861,7 +861,7 @@ void slavio_serial_ms_kbd_init(hwaddr base, qemu_irq irq,
qdev_prop_set_uint32(dev, "chnBtype", mouse);
qdev_prop_set_uint32(dev, "chnAtype", kbd);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(s, 0, irq);
sysbus_connect_irq(s, 1, irq);
sysbus_mmio_map(s, 0, base);
Expand Down
2 changes: 1 addition & 1 deletion hw/esp.c
View file
Expand Up @@ -633,7 +633,7 @@ void esp_init(hwaddr espaddr, int it_shift,
/* XXX for now until rc4030 has been changed to use DMA enable signal */
esp->dma_enabled = 1;
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(s, 0, irq);
sysbus_mmio_map(s, 0, espaddr);
*reset = qdev_get_gpio_in(dev, 0);
Expand Down
2 changes: 1 addition & 1 deletion hw/etraxfs.h
View file
Expand Up @@ -44,7 +44,7 @@ etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr,
qdev_prop_set_ptr(dev, "dma_out", dma_out);
qdev_prop_set_ptr(dev, "dma_in", dma_in);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
return dev;
}

Expand Down
14 changes: 7 additions & 7 deletions hw/exynos4210.c
View file
Expand Up @@ -154,7 +154,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
for (n = 0; n < EXYNOS4210_IRQ_GATE_NINPUTS; n++) {
gate_irq[i][n] = qdev_get_gpio_in(dev, n);
}
busdev = sysbus_from_qdev(dev);
busdev = SYS_BUS_DEVICE(dev);

/* Connect IRQ Gate output to cpu_irq */
sysbus_connect_irq(busdev, 0, cpu_irq[i]);
Expand All @@ -164,7 +164,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
dev = qdev_create(NULL, "a9mpcore_priv");
qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS);
qdev_init_nofail(dev);
busdev = sysbus_from_qdev(dev);
busdev = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(busdev, 0, EXYNOS4210_SMP_PRIVATE_BASE_ADDR);
for (n = 0; n < EXYNOS4210_NCPUS; n++) {
sysbus_connect_irq(busdev, n, gate_irq[n][0]);
Expand All @@ -180,7 +180,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
dev = qdev_create(NULL, "exynos4210.gic");
qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS);
qdev_init_nofail(dev);
busdev = sysbus_from_qdev(dev);
busdev = SYS_BUS_DEVICE(dev);
/* Map CPU interface */
sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_GIC_CPU_BASE_ADDR);
/* Map Distributer interface */
Expand All @@ -195,7 +195,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
/* Internal Interrupt Combiner */
dev = qdev_create(NULL, "exynos4210.combiner");
qdev_init_nofail(dev);
busdev = sysbus_from_qdev(dev);
busdev = SYS_BUS_DEVICE(dev);
for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) {
sysbus_connect_irq(busdev, n, s->irqs.int_gic_irq[n]);
}
Expand All @@ -206,7 +206,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
dev = qdev_create(NULL, "exynos4210.combiner");
qdev_prop_set_uint32(dev, "external", 1);
qdev_init_nofail(dev);
busdev = sysbus_from_qdev(dev);
busdev = SYS_BUS_DEVICE(dev);
for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) {
sysbus_connect_irq(busdev, n, s->irqs.ext_gic_irq[n]);
}
Expand Down Expand Up @@ -285,7 +285,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
/* Multi Core Timer */
dev = qdev_create(NULL, "exynos4210.mct");
qdev_init_nofail(dev);
busdev = sysbus_from_qdev(dev);
busdev = SYS_BUS_DEVICE(dev);
for (n = 0; n < 4; n++) {
/* Connect global timer interrupts to Combiner gpio_in */
sysbus_connect_irq(busdev, n,
Expand All @@ -311,7 +311,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,

dev = qdev_create(NULL, "exynos4210.i2c");
qdev_init_nofail(dev);
busdev = sysbus_from_qdev(dev);
busdev = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(busdev, 0, i2c_irq);
sysbus_mmio_map(busdev, 0, addr);
s->i2c_if[n] = (i2c_bus *)qdev_get_child_bus(dev, "i2c");
Expand Down
2 changes: 1 addition & 1 deletion hw/exynos4210_gic.c
View file
Expand Up @@ -290,7 +290,7 @@ static int exynos4210_gic_init(SysBusDevice *dev)
qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu);
qdev_prop_set_uint32(s->gic, "num-irq", EXYNOS4210_GIC_NIRQ);
qdev_init_nofail(s->gic);
busdev = sysbus_from_qdev(s->gic);
busdev = SYS_BUS_DEVICE(s->gic);

/* Pass through outbound IRQ lines from the GIC */
sysbus_pass_irq(dev, busdev);
Expand Down
2 changes: 1 addition & 1 deletion hw/exynos4210_uart.c
View file
Expand Up @@ -615,7 +615,7 @@ DeviceState *exynos4210_uart_create(hwaddr addr,
qdev_prop_set_uint32(dev, "rx-size", fifo_size);
qdev_prop_set_uint32(dev, "tx-size", fifo_size);

bus = sysbus_from_qdev(dev);
bus = SYS_BUS_DEVICE(dev);
qdev_init_nofail(dev);
if (addr != (hwaddr)-1) {
sysbus_mmio_map(bus, 0, addr);
Expand Down
2 changes: 1 addition & 1 deletion hw/exynos4_boards.c
View file
Expand Up @@ -87,7 +87,7 @@ static void lan9215_init(uint32_t base, qemu_irq irq)
qdev_set_nic_properties(dev, &nd_table[0]);
qdev_prop_set_uint32(dev, "mode_16bit", 1);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, base);
sysbus_connect_irq(s, 0, irq);
}
Expand Down
2 changes: 1 addition & 1 deletion hw/fw_cfg.c
View file
Expand Up @@ -489,7 +489,7 @@ FWCfgState *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
qdev_prop_set_uint32(dev, "ctl_iobase", ctl_port);
qdev_prop_set_uint32(dev, "data_iobase", data_port);
qdev_init_nofail(dev);
d = sysbus_from_qdev(dev);
d = SYS_BUS_DEVICE(dev);

s = DO_UPCAST(FWCfgState, busdev.qdev, dev);

Expand Down
10 changes: 5 additions & 5 deletions hw/grlib.h
View file
Expand Up @@ -61,7 +61,7 @@ DeviceState *grlib_irqmp_create(hwaddr base,

env->irq_manager = dev;

sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

*cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq,
dev,
Expand Down Expand Up @@ -91,10 +91,10 @@ DeviceState *grlib_gptimer_create(hwaddr base,
return NULL;
}

sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

for (i = 0; i < nr_timers; i++) {
sysbus_connect_irq(sysbus_from_qdev(dev), i, cpu_irqs[base_irq + i]);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, cpu_irqs[base_irq + i]);
}

return dev;
Expand All @@ -116,9 +116,9 @@ DeviceState *grlib_apbuart_create(hwaddr base,
return NULL;
}

sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);

return dev;
}
Expand Down
4 changes: 2 additions & 2 deletions hw/grlib_irqmp.c
View file
Expand Up @@ -109,7 +109,7 @@ void grlib_irqmp_ack(DeviceState *dev, int intno)

assert(dev != NULL);

sdev = sysbus_from_qdev(dev);
sdev = SYS_BUS_DEVICE(dev);
assert(sdev != NULL);

irqmp = FROM_SYSBUS(typeof(*irqmp), sdev);
Expand Down Expand Up @@ -138,7 +138,7 @@ void grlib_irqmp_set_irq(void *opaque, int irq, int level)

assert(opaque != NULL);

irqmp = FROM_SYSBUS(typeof(*irqmp), sysbus_from_qdev(opaque));
irqmp = FROM_SYSBUS(typeof(*irqmp), SYS_BUS_DEVICE(opaque));
assert(irqmp != NULL);

s = irqmp->state;
Expand Down

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