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Add (de)serializer for PhasedXZGate #2598
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LGTM with a few minor issues.
cirq.testing.assert_allclose_up_to_global_phase( | ||
cirq.unitary(deserialized_op), | ||
cirq.unitary(op), | ||
atol=1e-7, |
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All the input values you've chosen can be represented as floats exactly, so I wonder whether we could test this for exact equality?
I'm concerned that we may be missing an issue where a float is serialized as string with insufficient number of characters.
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Many tests in this module have the same issue, in that we are comparing serialized representations but we have to pick certain values to get exact equality of floats. I agree this is something we should solve, but perhaps we can do that in a separate PR for the entire module, rather than a one-off for this new case. WDYT?
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Yeah, this is definitely out of the scope of this PR.
FTR from our offline discussion: serialization and deserialization of values such as 0.5 or 0.125 that are represented exactly in both single and double precision floats should yield result exactly equal to the original value. We should not be throwing our hands up just because floats ;-)
cirq/google/common_serializers.py
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nit: let's make it two empty lines for consistency
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Done.
cirq/google/common_serializers.py
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@@ -127,6 +127,54 @@ def _near_mod_2(e, t, atol=1e-8): | |||
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# | |||
# PhasedXZ gate (de)serializer | |||
# TODO(maffoo): Move to SINGLE_QUBIT_(DE)SERIALIZERS when server support is in. |
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Better to file an issue and reference it in place of your username.
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Done: #2602.
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LGTM
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