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Pull requests: rdaly525/coreir

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Pull requests list

Commonlib.adc operator to add with carry
#1026 opened Jan 5, 2022 by jeffsetter Loading…
Fixes bug in verilog name generation logic
#1016 opened Jul 22, 2021 by rdaly525 Loading…
add verilog customized name for generator
#1013 opened Jun 25, 2021 by joyliu37 Loading…
Add initialization logic to accumulation register
#790 opened Aug 31, 2019 by norabarlow Loading…
CoreIR Changes/Fixes
#607 opened Aug 27, 2018 by JKHHai Loading…
Netify
#603 opened Aug 21, 2018 by rdaly525 Loading…
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