Add Metrics DSim

(refs #79 (comment))

README.md

@@ -111,6 +111,7 @@ Following EDA tools can accept the generated source files.
 * Simulation tools
     * Synopsys VCS
     * Cadence Xcelium
+    * Metrics DSim
     * Xilinx Vivado Simulator
     * Verilator
         * Need `-Wno-unoptflat` switch for Verilog RTL